From 2b2b4f9b14fdd4448200546f2a47d2603df30e38 Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Wed, 8 Aug 2018 16:36:10 +0530 Subject: gpu: nvgpu: Remove falcon header usage in nvlink For nvlink, we need to use minion registers instead of generic falcon registers. JIRA NVGPU-966 Change-Id: I850d2e2a4475394c37d2253c5034713c78439bd0 Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/1795086 Reviewed-by: svc-misra-checker Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/nvlink_gv100.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gv100') diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c index b51fc6fa..6d6fb4fd 100644 --- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c +++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c @@ -34,7 +34,6 @@ #include "gk20a/gk20a.h" #include "nvlink_gv100.h" -#include #include #include #include @@ -329,7 +328,7 @@ static bool gv100_nvlink_minion_falcon_isr(struct gk20a *g) if (!intr) return true; - if (intr & falcon_falcon_irqstat_exterr_true_f()) { + if (intr & minion_falcon_irqstat_exterr_true_f()) { nvgpu_err(g, "FALCON EXT ADDR: 0x%x 0x%x 0x%x", MINION_REG_RD32(g, 0x244), MINION_REG_RD32(g, 0x248), -- cgit v1.2.2