From 1e889871bc0ec3af05280f27497c0e7bd7a023b5 Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Fri, 25 May 2018 17:11:14 +0530 Subject: gpu: nvgpu: nvlink: Add HAL for pll setup Before nvlink 2.2, driver was responsible for setting the NVLink clocks during NVLink initialization. For the purpose of security, NVLink PLL handling is moved to Minion in nvlink 2.2 and driver should stop writing to these registers. JIRA NVLINK-167 Change-Id: I18392a29c322da55053037bfde62c8f74ee75288 Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/1730597 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/nvlink_gv100.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gv100/nvlink_gv100.h') diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.h b/drivers/gpu/nvgpu/gv100/nvlink_gv100.h index a583c576..0c58438c 100644 --- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.h +++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.h @@ -31,6 +31,7 @@ int gv100_nvlink_init(struct gk20a *g); int gv100_nvlink_isr(struct gk20a *g); int gv100_nvlink_minion_send_command(struct gk20a *g, u32 link_id, u32 command, u32 scratch_0, bool sync); +int gv100_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask); /* API */ int gv100_nvlink_link_early_init(struct gk20a *g, unsigned long mask); u32 gv100_nvlink_link_get_mode(struct gk20a *g, u32 link_id); -- cgit v1.2.2