From b1d0d8ece83ba0aa7b1e7ea9062eedc5cd9e4e33 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 26 Jun 2018 22:57:02 -0700 Subject: Revert "Revert: GV11B runlist preemption patches" This reverts commit 0b02c8589dcc507865a8fd398431c45fbda2ba9c. Originally change was reverted as it was making ap_compute test on embedded-qnx-hv e3550-t194 fail. With fixes related to replacing tsg preempt with runlist preempt during teardown, preempt timeout set to 100 ms (earlier this was set to 1000ms for t194 and 3000ms for legacy chips) and not issuing preempt timeout recovery if preempt fails, helped resolve the issue. Bug 200426402 Change-Id: If9a68d028a155075444cc1bdf411057e3388d48e Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1762563 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/mc_gv100.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'drivers/gpu/nvgpu/gv100/mc_gv100.c') diff --git a/drivers/gpu/nvgpu/gv100/mc_gv100.c b/drivers/gpu/nvgpu/gv100/mc_gv100.c index 46af100a..7d38a3fb 100644 --- a/drivers/gpu/nvgpu/gv100/mc_gv100.c +++ b/drivers/gpu/nvgpu/gv100/mc_gv100.c @@ -66,15 +66,14 @@ bool gv100_mc_is_intr_nvlink_pending(struct gk20a *g, u32 mc_intr_0) return (((mc_intr_0 & mc_intr_nvlink_pending_f()) != 0U) ? true : false); } -bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id) +bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id, + u32 *eng_intr_pending) { u32 mc_intr_0 = gk20a_readl(g, mc_intr_r(0)); u32 stall_intr, eng_intr_mask; eng_intr_mask = gk20a_fifo_act_eng_interrupt_mask(g, act_eng_id); - if ((mc_intr_0 & eng_intr_mask) != 0U) { - return true; - } + *eng_intr_pending = mc_intr_0 & eng_intr_mask; stall_intr = mc_intr_pfifo_pending_f() | mc_intr_hub_pending_f() | @@ -82,9 +81,10 @@ bool gv100_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id) mc_intr_pbus_pending_f() | mc_intr_ltc_pending_f() | mc_intr_nvlink_pending_f(); - if ((mc_intr_0 & stall_intr) != 0U) { - return true; - } - return false; + nvgpu_log(g, gpu_dbg_info | gpu_dbg_intr, + "mc_intr_0 = 0x%08x, eng_intr = 0x%08x", + mc_intr_0 & stall_intr, *eng_intr_pending); + + return (mc_intr_0 & (eng_intr_mask | stall_intr)) != 0U; } -- cgit v1.2.2