From 07ddc5aaad9a89a758cb5fe247c06d845b025e65 Mon Sep 17 00:00:00 2001 From: seshendra Date: Tue, 3 Sep 2019 10:47:41 -0700 Subject: gpu: nvgpu: Enabling/disabling FECS trace support - To enable FECS trace support, nvgpu should set the MSB of the read pointer (MAILBOX1). - The ucode will check if the feature is enabled/disabled before writing a record into the circular buffer. If the feature is disabled, it will not write the record. - If the feature is enabled and the buffer is not allocated, HW will throw a page fault error. Bug 2459186 Bug 200542611 Change-Id: I6f181643737d1cf1bda02077eaa714a3f4ef3d8c Signed-off-by: seshendra Reviewed-on: https://git-master.nvidia.com/r/2189250 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/hal_gv100.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gv100/hal_gv100.c') diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 31ca997f..9a3d2241 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -1,7 +1,7 @@ /* * GV100 Tegra HAL interface * - * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -1039,6 +1039,7 @@ int gv100_init_hal(struct gk20a *g) __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); + __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, false); /* for now */ __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); -- cgit v1.2.2