From 4efdc362175c67f93d3546727c8825686619c1cb Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Wed, 19 Sep 2018 12:23:05 +0530 Subject: gpu: nvgpu: ACR load split feature support -Added code to copy SEC2-RTOS ucode to non-wpr blob as part of prepare ucode blob. -Added code to setup & bootstrap GSP, as ACR-ASB needs ucode to execute on GSP falcon. -Defined LSF_FALCON_ID_GSPLITE for GSP falcon -Defined HSBIN_ACR_AHESASC_DBG/PROD_UCODE & HSBIN_ACR_ASB_DBG/PROD_UCODE to hold names of ACR AHESASC/ASB ucodes. -Added defines to hold name of SE2C RTOS ucodes JIRA NVGPUT-134 Change-Id: I824afed41f785a4ca0fb393bd023db5396c7a399 Signed-off-by: Mahantesh Kumbar Reviewed-on: https://git-master.nvidia.com/r/1790179 Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/gsp_gv100.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/gpu/nvgpu/gv100/gsp_gv100.h') diff --git a/drivers/gpu/nvgpu/gv100/gsp_gv100.h b/drivers/gpu/nvgpu/gv100/gsp_gv100.h index a4363d73..71d4564e 100644 --- a/drivers/gpu/nvgpu/gv100/gsp_gv100.h +++ b/drivers/gpu/nvgpu/gv100/gsp_gv100.h @@ -24,5 +24,8 @@ #define GSP_GV100_H int gv100_gsp_reset(struct gk20a *g); +int gv100_gsp_setup_hw_and_bl_bootstrap(struct gk20a *g, + struct hs_acr *acr_desc, + struct nvgpu_falcon_bl_info *bl_info); #endif /*GSP_GV100_H */ -- cgit v1.2.2