From 3f83528d769169fdaf25912f425226eaa07427f0 Mon Sep 17 00:00:00 2001 From: Vaibhav Kachore Date: Wed, 25 Jul 2018 17:12:38 +0530 Subject: gpu: nvgpu: correct parameters in set_pmm_register - This patch corrects parameters in set_pmm_registers - As FBP 6 and 7 are floorswept for GV100, GPU_LIT_NUM_FBPS should not be used - halify get_num_hwpm_perfmon and set_pmm_register Bug 2106999 Change-Id: Ib285b25d0c836c93b529dfe4e26c078159a3e6dd Signed-off-by: Vaibhav Kachore Reviewed-on: https://git-master.nvidia.com/r/1785620 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/gr_gv100.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/gv100/gr_gv100.h') diff --git a/drivers/gpu/nvgpu/gv100/gr_gv100.h b/drivers/gpu/nvgpu/gv100/gr_gv100.h index aae87f09..d0d76737 100644 --- a/drivers/gpu/nvgpu/gv100/gr_gv100.h +++ b/drivers/gpu/nvgpu/gv100/gr_gv100.h @@ -48,4 +48,8 @@ void gr_gv100_split_fbpa_broadcast_addr(struct gk20a *g, u32 addr, u32 *priv_addr_table, u32 *t); u32 gr_gv100_get_hw_accessor_stream_out_mode(void); void gr_gv100_init_hwpm_pmm_register(struct gk20a *g); +void gr_gv100_set_pmm_register(struct gk20a *g, u32 offset, u32 val, + u32 num_chiplets, u32 num_perfmons); +void gr_gv100_get_num_hwpm_perfmon(struct gk20a *g, u32 *num_sys_perfmon, + u32 *num_fbp_perfmon, u32 *num_gpc_perfmon); #endif /* NVGPU_GR_GV100_H */ -- cgit v1.2.2