From ed65f1f26e2d0ca4a491215297b61d25b0c1493b Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 24 May 2018 12:31:57 -0700 Subject: gpu: nvgpu: Move setting priv interrupt to priv_ring Registers to set priv interrupts are in priv_ring, but the code was in bus HAL. Move the code and related HALs to priv_ring instead. JIRA NVGPU-588 Change-Id: I708d11f77405dbba86586a0d1da42f65bcc1de9d Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1730889 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b') diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 2d6479fc..47986f1b 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -656,8 +656,6 @@ static const struct gpu_ops gp10b_ops = { .read_ptimer = gk20a_read_ptimer, .get_timestamps_zipper = nvgpu_get_timestamps_zipper, .bar1_bind = gk20a_bus_bar1_bind, - .set_ppriv_timeout_settings = - gk20a_bus_set_ppriv_timeout_settings, }, #if defined(CONFIG_GK20A_CYCLE_STATS) .css = { @@ -675,6 +673,8 @@ static const struct gpu_ops gp10b_ops = { .priv_ring = { .isr = gp10b_priv_ring_isr, .decode_error_code = gp10b_priv_ring_decode_error_code, + .set_ppriv_timeout_settings = + gk20a_priv_set_timeout_settings, }, .fuse = { .check_priv_security = gp10b_fuse_check_priv_security, -- cgit v1.2.2