From 528758f488a8f39c1306d8c17be4799273a94a5d Mon Sep 17 00:00:00 2001 From: Lakshmanan M Date: Wed, 22 Jun 2016 16:07:46 +0530 Subject: gpu: nvgpu: Add interface for privileged channel allocation Added interface for privileged channel allocation to execute the privileged method (ex. CE phys mode transfer). JIRA DNVGPU-53 Change-Id: I1606f8c9d10f29d5a10738b5110ce9f6a2bb428d Signed-off-by: Lakshmanan M Reviewed-on: http://git-master/r/1169320 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | 8 ++++++++ drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h | 8 ++++++++ drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h | 4 ++++ 3 files changed, 20 insertions(+) (limited to 'drivers/gpu/nvgpu/gp10b') diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c index 0aa6e29e..349f25fc 100644 --- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c @@ -132,6 +132,14 @@ static int channel_gp10b_setup_ramfc(struct channel_gk20a *c, gk20a_mem_wr32(g, mem, ram_fc_chid_w(), ram_fc_chid_id_f(c->hw_chid)); + if (c->is_privileged_channel) { + /* Set privilege level for channel */ + gk20a_mem_wr32(g, mem, ram_fc_config_w(), + pbdma_config_auth_level_privileged_f()); + + gk20a_channel_setup_ramfc_for_privileged_channel(c); + } + return channel_gp10b_commit_userd(c); } diff --git a/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h index 0caffb22..65aedccd 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h @@ -342,6 +342,14 @@ static inline u32 pbdma_userd_hi_addr_f(u32 v) { return (v & 0xff) << 0; } +static inline u32 pbdma_config_r(u32 i) +{ + return 0x000400f4 + i*8192; +} +static inline u32 pbdma_config_auth_level_privileged_f(void) +{ + return 0x100; +} static inline u32 pbdma_hce_ctrl_r(u32 i) { return 0x000400e4 + i*8192; diff --git a/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h index 55323579..89dfbc21 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h @@ -382,6 +382,10 @@ static inline u32 ram_fc_chid_id_w(void) { return 0; } +static inline u32 ram_fc_config_w(void) +{ + return 61; +} static inline u32 ram_fc_runlist_timeslice_w(void) { return 62; -- cgit v1.2.2