From 0dc80244eea4c7e504976d8028a3ddb72ba60b0e Mon Sep 17 00:00:00 2001 From: Sunny He Date: Thu, 22 Jun 2017 16:43:51 -0700 Subject: gpu: nvgpu: Reorganize ltc HAL initialization Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the ltc sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I1110e301e57b502cf7f97e6739424cb33cc52a69 Signed-off-by: Sunny He Reviewed-on: https://git-master/r/1507564 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 20 ++++++++++++++++++-- drivers/gpu/nvgpu/gp10b/ltc_gp10b.c | 27 ++++----------------------- drivers/gpu/nvgpu/gp10b/ltc_gp10b.h | 10 ++++++++-- 3 files changed, 30 insertions(+), 27 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b') diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index a1906a08..bf7a039c 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -36,6 +36,7 @@ #include "gp10b/therm_gp10b.h" #include "gp10b/priv_ring_gp10b.h" +#include "gm20b/ltc_gm20b.h" #include "gm20b/gr_gm20b.h" #include "gm20b/fifo_gm20b.h" #include "gm20b/pmu_gm20b.h" @@ -51,7 +52,22 @@ #include #include -static struct gpu_ops gp10b_ops = { +static const struct gpu_ops gp10b_ops = { + .ltc = { + .determine_L2_size_bytes = gp10b_determine_L2_size_bytes, + .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, + .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry, + .init_cbc = gm20b_ltc_init_cbc, + .init_fs_state = gp10b_ltc_init_fs_state, + .init_comptags = gp10b_ltc_init_comptags, + .cbc_ctrl = gm20b_ltc_cbc_ctrl, + .isr = gp10b_ltc_isr, + .cbc_fix_config = gm20b_ltc_cbc_fix_config, + .flush = gm20b_flush_ltc, +#ifdef CONFIG_DEBUG_FS + .sync_debugfs = gp10b_ltc_sync_debugfs, +#endif + }, .clock_gating = { .slcg_bus_load_gating_prod = gp10b_slcg_bus_load_gating_prod, @@ -196,6 +212,7 @@ int gp10b_init_hal(struct gk20a *g) struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics; u32 val; + gops->ltc = gp10b_ops.ltc; gops->clock_gating = gp10b_ops.clock_gating; gops->pmupstate = false; #ifdef CONFIG_TEGRA_ACR @@ -240,7 +257,6 @@ int gp10b_init_hal(struct gk20a *g) gp10b_init_priv_ring(gops); gp10b_init_gr(gops); gp10b_init_fecs_trace_ops(gops); - gp10b_init_ltc(gops); gp10b_init_fb(gops); gp10b_init_fifo(gops); gp10b_init_ce(gops); diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c index d94e56ce..baa275c7 100644 --- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c @@ -27,7 +27,7 @@ #include "gk20a/ltc_gk20a.h" #include "ltc_gp10b.h" -static int gp10b_determine_L2_size_bytes(struct gk20a *g) +int gp10b_determine_L2_size_bytes(struct gk20a *g) { u32 tmp; int ret; @@ -47,7 +47,7 @@ static int gp10b_determine_L2_size_bytes(struct gk20a *g) return ret; } -static int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) +int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) { /* max memory size (MB) to cover */ u32 max_size = gr->max_comptag_mem; @@ -188,7 +188,7 @@ void gp10b_ltc_isr(struct gk20a *g) } } -static void gp10b_ltc_init_fs_state(struct gk20a *g) +void gp10b_ltc_init_fs_state(struct gk20a *g) { u32 ltc_intr; @@ -206,7 +206,7 @@ static void gp10b_ltc_init_fs_state(struct gk20a *g) } #ifdef CONFIG_DEBUG_FS -static void gp10b_ltc_sync_debugfs(struct gk20a *g) +void gp10b_ltc_sync_debugfs(struct gk20a *g) { u32 reg_f = ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(); @@ -227,22 +227,3 @@ static void gp10b_ltc_sync_debugfs(struct gk20a *g) nvgpu_spinlock_release(&g->debugfs_lock); } #endif - -void gp10b_init_ltc(struct gpu_ops *gops) -{ - gops->ltc.determine_L2_size_bytes = gp10b_determine_L2_size_bytes; - gops->ltc.set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry; - gops->ltc.set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry; - gops->ltc.init_cbc = gm20b_ltc_init_cbc; - - /* GM20b specific ops. */ - gops->ltc.init_fs_state = gp10b_ltc_init_fs_state; - gops->ltc.init_comptags = gp10b_ltc_init_comptags; - gops->ltc.cbc_ctrl = gm20b_ltc_cbc_ctrl; - gops->ltc.isr = gp10b_ltc_isr; - gops->ltc.cbc_fix_config = gm20b_ltc_cbc_fix_config; - gops->ltc.flush = gm20b_flush_ltc; -#ifdef CONFIG_DEBUG_FS - gops->ltc.sync_debugfs = gp10b_ltc_sync_debugfs; -#endif -} diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h index d7571c8d..b5f2cda6 100644 --- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -16,5 +16,11 @@ struct gpu_ops; void gp10b_ltc_isr(struct gk20a *g); -void gp10b_init_ltc(struct gpu_ops *gops); + +int gp10b_determine_L2_size_bytes(struct gk20a *g); +int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr); +void gp10b_ltc_init_fs_state(struct gk20a *g); +#ifdef CONFIG_DEBUG_FS +void gp10b_ltc_sync_debugfs(struct gk20a *g); +#endif #endif -- cgit v1.2.2