From 0ac3ba2a99b745f577c752ebf9a6b4291730a36d Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Tue, 2 Jan 2018 15:48:46 -0800 Subject: gpu: nvgpu: gv11b: fix for gfx preemption Used chip specific attrib_cb_gfxp_default_size and attrib_cb_gfxp_size buffer sizes during committing global callback buffer when gfx preemption is requested. These sizes are different for gv11b from gp10b. For gp10b used smaller buffer sizes than specified value in hw manuals as per sw requirement. Also used gv11b specific preemption related functions: gr_gv11b_set_ctxsw_preemption_mode gr_gv11b_update_ctxsw_preemption_mode This is required because preemption related buffer sizes are different for gv11b from gp10b. More optimization will be done as part of NVGPU-484. Another issue fixed is: gpu va for preemption buffers still needs to be 8 bit aligned, even though 49 bits available now. This done because of legacy implementation of fecs ucode. Bug 1976694 Change-Id: I2dc923340d34d0dc5fe45419200d0cf4f53cdb23 Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1635027 GVS: Gerrit_Virtual_Submit Reviewed-by: Richard Zhao Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b') diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index b5194223..9a7f4f97 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c @@ -1,7 +1,7 @@ /* * GP10B GPU GR * - * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -406,12 +406,8 @@ int gr_gp10b_commit_global_cb_manager(struct gk20a *g, gk20a_dbg_fn(""); if (gr_ctx->graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) { - attrib_size_in_chunk = gr->attrib_cb_default_size + - (gr_gpc0_ppc0_cbm_beta_cb_size_v_gfxp_v() - - gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v()); - cb_attrib_cache_size_init = gr->attrib_cb_default_size + - (gr_gpc0_ppc0_cbm_beta_cb_size_v_gfxp_v() - - gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v()); + attrib_size_in_chunk = gr->attrib_cb_gfxp_size; + cb_attrib_cache_size_init = gr->attrib_cb_gfxp_default_size; } else { attrib_size_in_chunk = gr->attrib_cb_size; cb_attrib_cache_size_init = gr->attrib_cb_default_size; @@ -738,6 +734,14 @@ void gr_gp10b_cb_size_default(struct gk20a *g) gr->attrib_cb_default_size = 0x800; gr->alpha_cb_default_size = gr_gpc0_ppc0_cbm_alpha_cb_size_v_default_v(); + gr->attrib_cb_gfxp_default_size = + gr->attrib_cb_default_size + + (gr_gpc0_ppc0_cbm_beta_cb_size_v_gfxp_v() - + gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v()); + gr->attrib_cb_gfxp_size = + gr->attrib_cb_default_size + + (gr_gpc0_ppc0_cbm_beta_cb_size_v_gfxp_v() - + gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v()); } void gr_gp10b_set_alpha_circular_buffer_size(struct gk20a *g, u32 data) -- cgit v1.2.2