From 9e5f456f2b784656b44233b5ce5fc0f05f71bb3d Mon Sep 17 00:00:00 2001 From: smadhavan Date: Tue, 11 Sep 2018 12:51:19 +0530 Subject: nvgpu: gp10b: MISRA Rule 21.2 header guard fixes MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations in gp10b by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when there is no keyword repetition between file name and directory or 'NVGPU_HEADER-NAME' when there is repetition. JIRA NVGPU-1028 Change-Id: If66863e568d74a0bc7473cf8decacece1e1069f3 Signed-off-by: smadhavan Reviewed-on: https://git-master.nvidia.com/r/1819163 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/regops_gp10b.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b/regops_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/regops_gp10b.h b/drivers/gpu/nvgpu/gp10b/regops_gp10b.h index e8b9f325..9971b0d2 100644 --- a/drivers/gpu/nvgpu/gp10b/regops_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/regops_gp10b.h @@ -22,8 +22,8 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ -#ifndef __REGOPS_GP10B_H_ -#define __REGOPS_GP10B_H_ +#ifndef NVGPU_REGOPS_GP10B_H +#define NVGPU_REGOPS_GP10B_H struct dbg_session_gk20a; @@ -41,4 +41,4 @@ const struct regop_offset_range *gp10b_get_qctl_whitelist_ranges(void); u64 gp10b_get_qctl_whitelist_ranges_count(void); int gp10b_apply_smpc_war(struct dbg_session_gk20a *dbg_s); -#endif /* __REGOPS_GP10B_H_ */ +#endif /* NVGPU_REGOPS_GP10B_H */ -- cgit v1.2.2