From 227c6f7b7a499dd58e0db6859736cfe586ef0897 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 10 Aug 2018 14:09:36 -0700 Subject: gpu: nvgpu: Move fuse HAL to common Move implementation of fuse HAL to common/fuse. Also implements new fuse query functions for FBIO, FBP, TPC floorsweeping and security fuses. JIRA NVGPU-957 Change-Id: I55e256a4f1b59d50a721d4942907f70dc57467c4 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1797177 --- drivers/gpu/nvgpu/gp10b/pmu_gp10b.c | 14 -------------- 1 file changed, 14 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b/pmu_gp10b.c') diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c index 6ecb7957..d6497173 100644 --- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c @@ -36,7 +36,6 @@ #include "pmu_gp10b.h" #include -#include #define gp10b_dbg_pmu(g, fmt, arg...) \ nvgpu_log(g, gpu_dbg_pmu, fmt, ##arg) @@ -375,19 +374,6 @@ bool gp10b_is_priv_load(u32 falcon_id) return enable_status; } -/*Dump Security related fuses*/ -void pmu_dump_security_fuses_gp10b(struct gk20a *g) -{ - u32 val; - - nvgpu_err(g, "FUSE_OPT_SEC_DEBUG_EN_0: 0x%x", - gk20a_readl(g, fuse_opt_sec_debug_en_r())); - nvgpu_err(g, "FUSE_OPT_PRIV_SEC_EN_0: 0x%x", - gk20a_readl(g, fuse_opt_priv_sec_en_r())); - nvgpu_tegra_fuse_read_gcplex_config_fuse(g, &val); - nvgpu_err(g, "FUSE_GCPLEX_CONFIG_FUSE_0: 0x%x", val); -} - bool gp10b_is_pmu_supported(struct gk20a *g) { return true; -- cgit v1.2.2