From 27694ca572c4d7698b107c6713f0f0604b41c186 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 25 May 2018 10:27:10 -0700 Subject: gpu: nvgpu: Implement bus HAL for bar2 bind Implement BAR2 bind as a bus HAL and remove the corresponding MM HAL. BAR2 bind HW API is in bus. JIRA NVGPU-588 Change-Id: I3a8391b00f1ba65f9ed28b633f1d52bf7c984230 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1730896 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/mm_gp10b.c | 28 ++-------------------------- 1 file changed, 2 insertions(+), 26 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b/mm_gp10b.c') diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c index acd42dd8..50c96f36 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c @@ -34,7 +34,6 @@ #include #include -#include #include u32 gp10b_mm_get_default_big_page_size(void) @@ -62,8 +61,8 @@ int gp10b_init_mm_setup_hw(struct gk20a *g) g->ops.bus.bar1_bind(g, inst_block); - if (g->ops.mm.init_bar2_mm_hw_setup) { - err = g->ops.mm.init_bar2_mm_hw_setup(g); + if (g->ops.bus.bar2_bind) { + err = g->ops.bus.bar2_bind(g, &g->mm.bar2.inst_block); if (err) return err; } @@ -109,29 +108,6 @@ clean_up_va: return err; } -int gp10b_init_bar2_mm_hw_setup(struct gk20a *g) -{ - struct mm_gk20a *mm = &g->mm; - struct nvgpu_mem *inst_block = &mm->bar2.inst_block; - u64 inst_pa = nvgpu_inst_block_addr(g, inst_block); - - nvgpu_log_fn(g, " "); - - inst_pa = (u32)(inst_pa >> bus_bar2_block_ptr_shift_v()); - nvgpu_log_info(g, "bar2 inst block ptr: 0x%08x", (u32)inst_pa); - - gk20a_writel(g, bus_bar2_block_r(), - nvgpu_aperture_mask(g, inst_block, - bus_bar2_block_target_sys_mem_ncoh_f(), - bus_bar2_block_target_sys_mem_coh_f(), - bus_bar2_block_target_vid_mem_f()) | - bus_bar2_block_mode_virtual_f() | - bus_bar2_block_ptr_f(inst_pa)); - - nvgpu_log_fn(g, "done"); - return 0; -} - static void update_gmmu_pde3_locked(struct vm_gk20a *vm, const struct gk20a_mmu_level *l, struct nvgpu_gmmu_pd *pd, -- cgit v1.2.2