From e8c5b7dd170d4bf9c49c90c4f0e8eb0e8b17c9b2 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Tue, 11 Nov 2014 11:13:41 +0200 Subject: gpu: nvgpu: Add SM registers Add SM registers which were taken into use in GPU characteristics. Bug 1551769 Bug 1558186 Change-Id: I705da9ac25556b6b94137199e0acd9af3c8e6422 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/601020 --- drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h index 372c5e51..ca4aa6bd 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h @@ -1866,6 +1866,22 @@ static inline u32 gr_gpc0_tpc0_sm_cfg_sm_id_f(u32 v) { return (v & 0xffff) << 0; } +static inline u32 gr_gpc0_tpc0_sm_arch_r(void) +{ + return 0x0050469c; +} +static inline u32 gr_gpc0_tpc0_sm_arch_warp_count_v(u32 r) +{ + return (r >> 0) & 0xff; +} +static inline u32 gr_gpc0_tpc0_sm_arch_spa_version_v(u32 r) +{ + return (r >> 8) & 0xfff; +} +static inline u32 gr_gpc0_tpc0_sm_arch_sm_version_v(u32 r) +{ + return (r >> 20) & 0xfff; +} static inline u32 gr_gpc0_ppc0_pes_vsc_strem_r(void) { return 0x00503018; -- cgit v1.2.2