From dfdd5ba3cbc52f7359188783159b103d1d2edcf2 Mon Sep 17 00:00:00 2001 From: Ken Adams Date: Fri, 25 Jul 2014 16:47:24 -0400 Subject: gpu: nvgpu: gp10b headers first cut. just to get started... Change-Id: I3682909f9ac0a5395ec834046789356f53d0c47d Signed-off-by: Ken Adams Reviewed-on: http://git-master/r/447753 --- drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h | 221 ++++++++++++++++++++++++++++++++++ 1 file changed, 221 insertions(+) create mode 100644 drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h (limited to 'drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h new file mode 100644 index 00000000..9dacabce --- /dev/null +++ b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h @@ -0,0 +1,221 @@ +/* + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +/* + * Function naming determines intended use: + * + * _r(void) : Returns the offset for register . + * + * _o(void) : Returns the offset for element . + * + * _w(void) : Returns the word offset for word (4 byte) element . + * + * __s(void) : Returns size of field of register in bits. + * + * __f(u32 v) : Returns a value based on 'v' which has been shifted + * and masked to place it at field of register . This value + * can be |'d with others to produce a full register value for + * register . + * + * __m(void) : Returns a mask for field of register . This + * value can be ~'d and then &'d to clear the value of field for + * register . + * + * ___f(void) : Returns the constant value after being shifted + * to place it at field of register . This value can be |'d + * with others to produce a full register value for . + * + * __v(u32 r) : Returns the value of field from a full register + * value 'r' after being shifted to place its LSB at bit 0. + * This value is suitable for direct comparison with other unshifted + * values appropriate for use in field of register . + * + * ___v(void) : Returns the constant value for defined for + * field of register . This value is suitable for direct + * comparison with unshifted values appropriate for use in field + * of register . + */ +#ifndef _hw_fb_gp10b_h_ +#define _hw_fb_gp10b_h_ + +static inline u32 fb_fbhub_num_active_ltcs_r(void) +{ + return 0x00100800; +} +static inline u32 fb_mmu_ctrl_r(void) +{ + return 0x00100c80; +} +static inline u32 fb_mmu_ctrl_vm_pg_size_f(u32 v) +{ + return (v & 0x1) << 0; +} +static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r) +{ + return (r >> 15) & 0x1; +} +static inline u32 fb_mmu_ctrl_pri_fifo_empty_false_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_ctrl_pri_fifo_space_v(u32 r) +{ + return (r >> 16) & 0xff; +} +static inline u32 fb_mmu_invalidate_pdb_r(void) +{ + return 0x00100cb8; +} +static inline u32 fb_mmu_invalidate_pdb_aperture_vid_mem_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_invalidate_pdb_addr_f(u32 v) +{ + return (v & 0xfffffff) << 4; +} +static inline u32 fb_mmu_invalidate_r(void) +{ + return 0x00100cbc; +} +static inline u32 fb_mmu_invalidate_all_va_true_f(void) +{ + return 0x1; +} +static inline u32 fb_mmu_invalidate_all_pdb_true_f(void) +{ + return 0x2; +} +static inline u32 fb_mmu_invalidate_trigger_s(void) +{ + return 1; +} +static inline u32 fb_mmu_invalidate_trigger_f(u32 v) +{ + return (v & 0x1) << 31; +} +static inline u32 fb_mmu_invalidate_trigger_m(void) +{ + return 0x1 << 31; +} +static inline u32 fb_mmu_invalidate_trigger_v(u32 r) +{ + return (r >> 31) & 0x1; +} +static inline u32 fb_mmu_invalidate_trigger_true_f(void) +{ + return 0x80000000; +} +static inline u32 fb_mmu_debug_wr_r(void) +{ + return 0x00100cc8; +} +static inline u32 fb_mmu_debug_wr_aperture_s(void) +{ + return 2; +} +static inline u32 fb_mmu_debug_wr_aperture_f(u32 v) +{ + return (v & 0x3) << 0; +} +static inline u32 fb_mmu_debug_wr_aperture_m(void) +{ + return 0x3 << 0; +} +static inline u32 fb_mmu_debug_wr_aperture_v(u32 r) +{ + return (r >> 0) & 0x3; +} +static inline u32 fb_mmu_debug_wr_aperture_vid_mem_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_debug_wr_vol_false_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_debug_wr_vol_true_v(void) +{ + return 0x00000001; +} +static inline u32 fb_mmu_debug_wr_vol_true_f(void) +{ + return 0x4; +} +static inline u32 fb_mmu_debug_wr_addr_v(u32 r) +{ + return (r >> 4) & 0xfffffff; +} +static inline u32 fb_mmu_debug_wr_addr_alignment_v(void) +{ + return 0x0000000c; +} +static inline u32 fb_mmu_debug_rd_r(void) +{ + return 0x00100ccc; +} +static inline u32 fb_mmu_debug_rd_aperture_vid_mem_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_debug_rd_vol_false_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_debug_rd_addr_v(u32 r) +{ + return (r >> 4) & 0xfffffff; +} +static inline u32 fb_mmu_debug_rd_addr_alignment_v(void) +{ + return 0x0000000c; +} +static inline u32 fb_mmu_debug_ctrl_r(void) +{ + return 0x00100cc4; +} +static inline u32 fb_mmu_debug_ctrl_debug_v(u32 r) +{ + return (r >> 16) & 0x1; +} +static inline u32 fb_mmu_debug_ctrl_debug_enabled_v(void) +{ + return 0x00000001; +} +static inline u32 fb_mmu_vpr_info_r(void) +{ + return 0x00100cd0; +} +static inline u32 fb_mmu_vpr_info_fetch_f(u32 v) +{ + return (v & 0x1) << 2; +} +static inline u32 fb_mmu_vpr_info_fetch_v(u32 r) +{ + return (r >> 2) & 0x1; +} +static inline u32 fb_mmu_vpr_info_fetch_false_v(void) +{ + return 0x00000000; +} +static inline u32 fb_mmu_vpr_info_fetch_true_v(void) +{ + return 0x00000001; +} +#endif -- cgit v1.2.2 From 07b7a534fa8d5e93420521fcb5e745acad386f00 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 27 Oct 2014 09:47:25 +0200 Subject: gpu: nvgpu: Synchronize gp10b headers with gm20b Added all registers added to gk20a and gm20b to gp10b. Remove gp10b trim registers, because they will not be accessed by CPU. Bug 1567274 Change-Id: Ib6be34ce3d55901bd7e1f30eea8e43725719a912 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/590312 GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h index 9dacabce..d2ecdce1 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h @@ -66,6 +66,10 @@ static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void) { return 0x0; } +static inline u32 fb_mmu_ctrl_vm_pg_size_64kb_f(void) +{ + return 0x1; +} static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r) { return (r >> 15) & 0x1; @@ -78,6 +82,22 @@ static inline u32 fb_mmu_ctrl_pri_fifo_space_v(u32 r) { return (r >> 16) & 0xff; } +static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_v(u32 r) +{ + return (r >> 11) & 0x1; +} +static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_true_f(void) +{ + return 0x800; +} +static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_false_f(void) +{ + return 0x0; +} +static inline u32 fb_priv_mmu_phy_secure_r(void) +{ + return 0x00100ce4; +} static inline u32 fb_mmu_invalidate_pdb_r(void) { return 0x00100cb8; @@ -158,9 +178,9 @@ static inline u32 fb_mmu_debug_wr_vol_true_f(void) { return 0x4; } -static inline u32 fb_mmu_debug_wr_addr_v(u32 r) +static inline u32 fb_mmu_debug_wr_addr_f(u32 v) { - return (r >> 4) & 0xfffffff; + return (v & 0xfffffff) << 4; } static inline u32 fb_mmu_debug_wr_addr_alignment_v(void) { @@ -178,9 +198,9 @@ static inline u32 fb_mmu_debug_rd_vol_false_f(void) { return 0x0; } -static inline u32 fb_mmu_debug_rd_addr_v(u32 r) +static inline u32 fb_mmu_debug_rd_addr_f(u32 v) { - return (r >> 4) & 0xfffffff; + return (v & 0xfffffff) << 4; } static inline u32 fb_mmu_debug_rd_addr_alignment_v(void) { @@ -202,10 +222,6 @@ static inline u32 fb_mmu_vpr_info_r(void) { return 0x00100cd0; } -static inline u32 fb_mmu_vpr_info_fetch_f(u32 v) -{ - return (v & 0x1) << 2; -} static inline u32 fb_mmu_vpr_info_fetch_v(u32 r) { return (r >> 2) & 0x1; -- cgit v1.2.2 From 1f9b2f2852a48ee571ce631a2d72ac02db2d6c87 Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Tue, 3 Feb 2015 12:56:24 -0800 Subject: gpu: nvgpu: gp10b: update fb headers Update fb header with new mmu invalidate fields. Bug 1587836 Change-Id: I33a30dc742f35d325c528a9bc73fea8cfc21e856 Signed-off-by: Seshendra Gadagottu Reviewed-on: http://git-master/r/680800 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h | 214 +++++++++++++++++++++++++++++++++- 1 file changed, 213 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h index d2ecdce1..2078bdca 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -122,6 +122,218 @@ static inline u32 fb_mmu_invalidate_all_pdb_true_f(void) { return 0x2; } +static inline u32 fb_mmu_invalidate_hubtlb_only_s(void) +{ + return 1; +} +static inline u32 fb_mmu_invalidate_hubtlb_only_f(u32 v) +{ + return (v & 0x1) << 2; +} +static inline u32 fb_mmu_invalidate_hubtlb_only_m(void) +{ + return 0x1 << 2; +} +static inline u32 fb_mmu_invalidate_hubtlb_only_v(u32 r) +{ + return (r >> 2) & 0x1; +} +static inline u32 fb_mmu_invalidate_hubtlb_only_true_f(void) +{ + return 0x4; +} +static inline u32 fb_mmu_invalidate_replay_s(void) +{ + return 3; +} +static inline u32 fb_mmu_invalidate_replay_f(u32 v) +{ + return (v & 0x7) << 3; +} +static inline u32 fb_mmu_invalidate_replay_m(void) +{ + return 0x7 << 3; +} +static inline u32 fb_mmu_invalidate_replay_v(u32 r) +{ + return (r >> 3) & 0x7; +} +static inline u32 fb_mmu_invalidate_replay_none_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_invalidate_replay_start_f(void) +{ + return 0x8; +} +static inline u32 fb_mmu_invalidate_replay_start_ack_all_f(void) +{ + return 0x10; +} +static inline u32 fb_mmu_invalidate_replay_cancel_targeted_f(void) +{ + return 0x18; +} +static inline u32 fb_mmu_invalidate_replay_cancel_global_f(void) +{ + return 0x20; +} +static inline u32 fb_mmu_invalidate_replay_cancel_f(void) +{ + return 0x20; +} +static inline u32 fb_mmu_invalidate_sys_membar_s(void) +{ + return 1; +} +static inline u32 fb_mmu_invalidate_sys_membar_f(u32 v) +{ + return (v & 0x1) << 6; +} +static inline u32 fb_mmu_invalidate_sys_membar_m(void) +{ + return 0x1 << 6; +} +static inline u32 fb_mmu_invalidate_sys_membar_v(u32 r) +{ + return (r >> 6) & 0x1; +} +static inline u32 fb_mmu_invalidate_sys_membar_true_f(void) +{ + return 0x40; +} +static inline u32 fb_mmu_invalidate_ack_s(void) +{ + return 2; +} +static inline u32 fb_mmu_invalidate_ack_f(u32 v) +{ + return (v & 0x3) << 7; +} +static inline u32 fb_mmu_invalidate_ack_m(void) +{ + return 0x3 << 7; +} +static inline u32 fb_mmu_invalidate_ack_v(u32 r) +{ + return (r >> 7) & 0x3; +} +static inline u32 fb_mmu_invalidate_ack_ack_none_required_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_invalidate_ack_ack_intranode_f(void) +{ + return 0x100; +} +static inline u32 fb_mmu_invalidate_ack_ack_globally_f(void) +{ + return 0x80; +} +static inline u32 fb_mmu_invalidate_cancel_client_id_s(void) +{ + return 6; +} +static inline u32 fb_mmu_invalidate_cancel_client_id_f(u32 v) +{ + return (v & 0x3f) << 9; +} +static inline u32 fb_mmu_invalidate_cancel_client_id_m(void) +{ + return 0x3f << 9; +} +static inline u32 fb_mmu_invalidate_cancel_client_id_v(u32 r) +{ + return (r >> 9) & 0x3f; +} +static inline u32 fb_mmu_invalidate_cancel_gpc_id_s(void) +{ + return 5; +} +static inline u32 fb_mmu_invalidate_cancel_gpc_id_f(u32 v) +{ + return (v & 0x1f) << 15; +} +static inline u32 fb_mmu_invalidate_cancel_gpc_id_m(void) +{ + return 0x1f << 15; +} +static inline u32 fb_mmu_invalidate_cancel_gpc_id_v(u32 r) +{ + return (r >> 15) & 0x1f; +} +static inline u32 fb_mmu_invalidate_cancel_client_type_s(void) +{ + return 1; +} +static inline u32 fb_mmu_invalidate_cancel_client_type_f(u32 v) +{ + return (v & 0x1) << 20; +} +static inline u32 fb_mmu_invalidate_cancel_client_type_m(void) +{ + return 0x1 << 20; +} +static inline u32 fb_mmu_invalidate_cancel_client_type_v(u32 r) +{ + return (r >> 20) & 0x1; +} +static inline u32 fb_mmu_invalidate_cancel_client_type_gpc_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_invalidate_cancel_client_type_hub_f(void) +{ + return 0x100000; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_s(void) +{ + return 3; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_f(u32 v) +{ + return (v & 0x7) << 24; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_m(void) +{ + return 0x7 << 24; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_v(u32 r) +{ + return (r >> 24) & 0x7; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_all_f(void) +{ + return 0x0; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_pte_only_f(void) +{ + return 0x1000000; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_up_to_pde0_f(void) +{ + return 0x2000000; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_up_to_pde1_f(void) +{ + return 0x3000000; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_up_to_pde2_f(void) +{ + return 0x4000000; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_up_to_pde3_f(void) +{ + return 0x5000000; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_up_to_pde4_f(void) +{ + return 0x6000000; +} +static inline u32 fb_mmu_invalidate_cancel_cache_level_up_to_pde5_f(void) +{ + return 0x7000000; +} static inline u32 fb_mmu_invalidate_trigger_s(void) { return 1; -- cgit v1.2.2 From d4e870edd0251cb8e8ec4915490e8716b8b67fa9 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 25 Mar 2015 10:50:41 -0700 Subject: gpu: nvgpu: gp10b: Regenerate HW headers Change-Id: Id1954b6e96dbc75ab217a4b36a11a0457f9ceef1 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/722845 --- drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h index 2078bdca..1fee19b1 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h @@ -426,10 +426,18 @@ static inline u32 fb_mmu_debug_ctrl_debug_v(u32 r) { return (r >> 16) & 0x1; } +static inline u32 fb_mmu_debug_ctrl_debug_m(void) +{ + return 0x1 << 16; +} static inline u32 fb_mmu_debug_ctrl_debug_enabled_v(void) { return 0x00000001; } +static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void) +{ + return 0x00000000; +} static inline u32 fb_mmu_vpr_info_r(void) { return 0x00100cd0; -- cgit v1.2.2 From ae893b37c014b13f68aa7547640bda3589363f4d Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 8 Apr 2016 12:03:32 -0700 Subject: gpu: nvgpu: gp10b: Use sysmem aperture for SoC memory In Tegra GPU, SoC memory has to be accessed as vidmem. In discrete GPU, it has to be accessed as sysmem. Change-Id: Id26588df17b4921533804f72bc8c0ac3892ae154 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1122591 GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu Tested-by: Seshendra Gadagottu Reviewed-by: Konsta Holtta --- drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h index 1fee19b1..236c2f8a 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -106,6 +106,10 @@ static inline u32 fb_mmu_invalidate_pdb_aperture_vid_mem_f(void) { return 0x0; } +static inline u32 fb_mmu_invalidate_pdb_aperture_sys_mem_f(void) +{ + return 0x2; +} static inline u32 fb_mmu_invalidate_pdb_addr_f(u32 v) { return (v & 0xfffffff) << 4; @@ -378,6 +382,14 @@ static inline u32 fb_mmu_debug_wr_aperture_vid_mem_f(void) { return 0x0; } +static inline u32 fb_mmu_debug_wr_aperture_sys_mem_coh_f(void) +{ + return 0x2; +} +static inline u32 fb_mmu_debug_wr_aperture_sys_mem_ncoh_f(void) +{ + return 0x3; +} static inline u32 fb_mmu_debug_wr_vol_false_f(void) { return 0x0; @@ -406,6 +418,14 @@ static inline u32 fb_mmu_debug_rd_aperture_vid_mem_f(void) { return 0x0; } +static inline u32 fb_mmu_debug_rd_aperture_sys_mem_coh_f(void) +{ + return 0x2; +} +static inline u32 fb_mmu_debug_rd_aperture_sys_mem_ncoh_f(void) +{ + return 0x3; +} static inline u32 fb_mmu_debug_rd_vol_false_f(void) { return 0x0; -- cgit v1.2.2 From 7be0ee4bb9c1436ecf37984d2e3f5e39a48537fe Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Tue, 19 Apr 2016 15:49:01 -0700 Subject: gpu: nvgpu: gp10b: Add def for NISO sysmem flush addr Add definition for NISO sysmem flush addr. This makes gp10b in sync with rest of chips. Change-Id: Ic3548585000602497e9d7ff271144b9ca9b2acca Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1129217 Reviewed-by: Seshendra Gadagottu GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h index 236c2f8a..ec340777 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_fb_gp10b.h @@ -474,4 +474,8 @@ static inline u32 fb_mmu_vpr_info_fetch_true_v(void) { return 0x00000001; } +static inline u32 fb_niso_flush_sysmem_addr_r(void) +{ + return 0x00100c10; +} #endif -- cgit v1.2.2