From 193a2ed38ca51d898ac811820ab86237c84e18eb Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Thu, 18 Jan 2018 11:02:08 -0800 Subject: gpu: nvgpu: add sw method for SET_BES_CROP_DEBUG4 Added sw method support for SET_BES_CROP_DEBUG4. In this sw method: CLAMP_FP_BLEND_TO_MAXVAL forces overflow and CLAMP_FP_BLEND_TO_INF blend results to clamp to FP maxval. Added support for this sw method in gp10b/gp106/gv11b and gv100. Bug 2046636 Change-Id: I3a9e97587aca76718f7f504ea3b853f87409092a Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1641529 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/gr_gp10b.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h index 8d553d37..8f1ebb16 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h @@ -49,9 +49,13 @@ enum { #define NVC097_SET_CIRCULAR_BUFFER_SIZE 0x1280 #define NVC097_SET_SHADER_EXCEPTIONS 0x1528 #define NVC097_SET_BES_CROP_DEBUG3 0x10c4 +#define NVC097_SET_BES_CROP_DEBUG4 0x10b0 #define NVC0C0_SET_SHADER_EXCEPTIONS 0x1528 #define NVC0C0_SET_RD_COALESCE 0x0228 +#define NVC097_BES_CROP_DEBUG4_CLAMP_FP_BLEND_TO_INF 0x0 +#define NVC097_BES_CROP_DEBUG4_CLAMP_FP_BLEND_TO_MAXVAL 0x1 + int gr_gp10b_init_fs_state(struct gk20a *g); int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size, struct nvgpu_mem *mem); @@ -85,6 +89,7 @@ int gr_gp10b_add_zbc_depth(struct gk20a *g, struct gr_gk20a *gr, u32 gr_gp10b_pagepool_default_size(struct gk20a *g); int gr_gp10b_calc_global_ctx_buffer_size(struct gk20a *g); void gr_gp10b_set_bes_crop_debug3(struct gk20a *g, u32 data); +void gr_gp10b_set_bes_crop_debug4(struct gk20a *g, u32 data); int gr_gp10b_handle_sw_method(struct gk20a *g, u32 addr, u32 class_num, u32 offset, u32 data); void gr_gp10b_cb_size_default(struct gk20a *g); -- cgit v1.2.2