From 05388ad24a61c43a110e3d235622c23a356b5df7 Mon Sep 17 00:00:00 2001 From: David Nieto Date: Thu, 18 May 2017 16:50:57 -0700 Subject: gpu: nvgpu: re-arrange parity counters (1) Re-arrange the structure for parity counters reporting so multiple units can be managed JIRA: GPUT19X-84 Change-Id: If59a883dfe22d5a1d91a6d0ed2f5a6254434ffcb Signed-off-by: David Nieto Reviewed-on: http://git-master/r/1485276 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/gr_gp10b.h | 27 --------------------------- 1 file changed, 27 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h index 588a7d8f..81ec7927 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h @@ -22,12 +22,6 @@ struct gpu_ops; -struct gr_gp10b_ecc_stat { - char **names; - u32 *counters; - struct hlist_node hash_node; -}; - enum { PASCAL_CHANNEL_GPFIFO_A = 0xC06F, PASCAL_A = 0xC097, @@ -68,27 +62,6 @@ struct gr_t18x { struct dentry *debugfs_dump_ctxsw_stats; } ctx_vars; - struct { - struct gr_gp10b_ecc_stat sm_lrf_single_err_count; - struct gr_gp10b_ecc_stat sm_lrf_double_err_count; - - struct gr_gp10b_ecc_stat sm_shm_sec_count; - struct gr_gp10b_ecc_stat sm_shm_sed_count; - struct gr_gp10b_ecc_stat sm_shm_ded_count; - - struct gr_gp10b_ecc_stat tex_total_sec_pipe0_count; - struct gr_gp10b_ecc_stat tex_total_ded_pipe0_count; - struct gr_gp10b_ecc_stat tex_unique_sec_pipe0_count; - struct gr_gp10b_ecc_stat tex_unique_ded_pipe0_count; - struct gr_gp10b_ecc_stat tex_total_sec_pipe1_count; - struct gr_gp10b_ecc_stat tex_total_ded_pipe1_count; - struct gr_gp10b_ecc_stat tex_unique_sec_pipe1_count; - struct gr_gp10b_ecc_stat tex_unique_ded_pipe1_count; - - struct gr_gp10b_ecc_stat l2_sec_count; - struct gr_gp10b_ecc_stat l2_ded_count; - } ecc_stats; - u32 fecs_feature_override_ecc_val; int cilp_preempt_pending_chid; -- cgit v1.2.2