From 98d91dd2609faadfa4aa9aafad5e295c924ae08f Mon Sep 17 00:00:00 2001 From: Aparna Das Date: Thu, 15 Feb 2018 15:39:10 -0800 Subject: gpu: nvgpu: add hal op to handle post event id The vserver variant for gr post event id needs different functionality to send interrupt to VM. Add HAL operation to allow overriding vserver usecase. Jira VQRM-2982 Change-Id: I915d089ef751023968c1e8ab181c21afeec997a5 Signed-off-by: Aparna Das Reviewed-on: https://git-master.nvidia.com/r/1658382 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c') diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 17685f59..8cbda409 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c @@ -1814,8 +1814,8 @@ int gr_gp10b_set_cilp_preempt_pending(struct gk20a *g, tsg = &g->fifo.tsg[fault_ch->tsgid]; - gk20a_tsg_event_id_post_event(tsg, - NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED); + g->ops.fifo.post_event_id(tsg, + NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED); return 0; } @@ -2036,8 +2036,8 @@ int gr_gp10b_handle_fecs_error(struct gk20a *g, tsg = &g->fifo.tsg[ch->tsgid]; - gk20a_tsg_event_id_post_event(tsg, - NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE); + g->ops.fifo.post_event_id(tsg, + NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE); gk20a_channel_put(ch); } -- cgit v1.2.2