From 8e2d0c7b3d98149fd753792f183e6a1ae9ebc456 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 4 Dec 2018 10:41:19 -0800 Subject: gpu: nvgpu: add handling for ctxsw_intr0 ctxsw_intr0 is triggered by ucode even if it is not enabled by driver. Add handling for processing ctxsw_intr0. fecs mailbox(6) is used to report fecs/gpccs misc error codes. Also dump falcon stats for unhandled fecs intr. Bug 2361571 Bug 200472922 Change-Id: Iefb3c0d46ad1d08db07fd3c08cff91a77835908c Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1966984 (cherry picked from commit 2c379cad0f6a01d07102898b362735a574f3aea8 in dev-kernel) Reviewed-on: https://git-master.nvidia.com/r/1979745 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Debarshi Dutta Tested-by: Debarshi Dutta Reviewed-by: Bitan Biswas Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gp10b/gr_gp10b.c') diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 913434ab..be1e2038 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c @@ -1996,7 +1996,9 @@ int gr_gp10b_handle_fecs_error(struct gk20a *g, * INTR1 (bit 1 of the HOST_INT_STATUS_CTXSW_INTR) * indicates that a CILP ctxsw save has finished */ - if (gr_fecs_intr & gr_fecs_host_int_status_ctxsw_intr_f(2)) { + + if ((gr_fecs_intr & + gr_fecs_host_int_status_ctxsw_intr_f(CTXSW_INTR1)) != 0U) { nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "CILP: ctxsw save completed!\n"); -- cgit v1.2.2