From 9e5f456f2b784656b44233b5ce5fc0f05f71bb3d Mon Sep 17 00:00:00 2001 From: smadhavan Date: Tue, 11 Sep 2018 12:51:19 +0530 Subject: nvgpu: gp10b: MISRA Rule 21.2 header guard fixes MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations in gp10b by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when there is no keyword repetition between file name and directory or 'NVGPU_HEADER-NAME' when there is repetition. JIRA NVGPU-1028 Change-Id: If66863e568d74a0bc7473cf8decacece1e1069f3 Signed-off-by: smadhavan Reviewed-on: https://git-master.nvidia.com/r/1819163 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp10b/ce_gp10b.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gp10b/ce_gp10b.h') diff --git a/drivers/gpu/nvgpu/gp10b/ce_gp10b.h b/drivers/gpu/nvgpu/gp10b/ce_gp10b.h index 525599af..4fa27d1e 100644 --- a/drivers/gpu/nvgpu/gp10b/ce_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/ce_gp10b.h @@ -21,8 +21,8 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ -#ifndef __CE_GP10B_H__ -#define __CE_GP10B_H__ +#ifndef NVGPU_CE_GP10B_H +#define NVGPU_CE_GP10B_H #include @@ -31,4 +31,4 @@ struct gk20a; void gp10b_ce_isr(struct gk20a *g, u32 inst_id, u32 pri_base); u32 gp10b_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base); -#endif /*__CE2_GP10B_H__*/ +#endif /* NVGPU_CE_GP10B_H */ -- cgit v1.2.2