From d59271c7b79080388371877fc2d10574ca42206a Mon Sep 17 00:00:00 2001 From: Sunny He Date: Mon, 24 Jul 2017 12:18:38 -0700 Subject: gpu: nvgpu: Remove privsecurity flag from gpu_ops Replace privsecurity boolean flag in gpu_ops with entry in common flag system. The new common flag is NVGPU_SEC_PRIVSECURITY Jira NVGPU-74 Change-Id: I4b258f5ffbe30a6344ffba0ece51c6f5d47ebec1 Signed-off-by: Sunny He Reviewed-on: https://git-master.nvidia.com/r/1525713 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gp106/gr_gp106.c | 6 ++++-- drivers/gpu/nvgpu/gp106/gr_gp106.h | 6 ++++-- drivers/gpu/nvgpu/gp106/hal_gp106.c | 6 +++--- drivers/gpu/nvgpu/gp106/pmu_gp106.c | 7 ++++--- drivers/gpu/nvgpu/gp106/pmu_gp106.h | 4 +++- 5 files changed, 18 insertions(+), 11 deletions(-) (limited to 'drivers/gpu/nvgpu/gp106') diff --git a/drivers/gpu/nvgpu/gp106/gr_gp106.c b/drivers/gpu/nvgpu/gp106/gr_gp106.c index bf266b66..76e5cf89 100644 --- a/drivers/gpu/nvgpu/gp106/gr_gp106.c +++ b/drivers/gpu/nvgpu/gp106/gr_gp106.c @@ -234,9 +234,11 @@ fail: return err; } -void gp106_init_gr(struct gpu_ops *gops) +void gp106_init_gr(struct gk20a *g) { - gp10b_init_gr(gops); + struct gpu_ops *gops = &g->ops; + + gp10b_init_gr(g); gops->gr.is_valid_class = gr_gp106_is_valid_class; gops->gr.pagepool_default_size = gr_gp106_pagepool_default_size; gops->gr.handle_sw_method = gr_gp106_handle_sw_method; diff --git a/drivers/gpu/nvgpu/gp106/gr_gp106.h b/drivers/gpu/nvgpu/gp106/gr_gp106.h index 4fe22ee9..3f49aac6 100644 --- a/drivers/gpu/nvgpu/gp106/gr_gp106.h +++ b/drivers/gpu/nvgpu/gp106/gr_gp106.h @@ -1,7 +1,7 @@ /* * GP106 GPU GR * - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -16,11 +16,13 @@ #ifndef _NVGPU_GR_GP106_H_ #define _NVGPU_GR_GP106_H_ +struct gk20a; + enum { PASCAL_B = 0xC197, PASCAL_COMPUTE_B = 0xC1C0, }; -void gp106_init_gr(struct gpu_ops *gops); +void gp106_init_gr(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 80117ede..49c4b358 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -416,18 +416,18 @@ int gp106_init_hal(struct gk20a *g) gp106_ops.chip_init_gpu_characteristics; gops->bios_init = gp106_ops.bios_init; - gops->privsecurity = 1; + __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true); __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); g->bootstrap_owner = LSF_FALCON_ID_SEC2; - gp106_init_gr(gops); + gp106_init_gr(g); gp10b_init_fecs_trace_ops(gops); gp106_init_fb(gops); gp10b_init_ce(gops); gp106_init_gr_ctx(gops); gp106_init_mm(gops); - gp106_init_pmu_ops(gops); + gp106_init_pmu_ops(g); gp106_init_clk_ops(gops); gp106_init_clk_arb_ops(gops); gp106_init_regops(gops); diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c index a09aa30b..a9fb794d 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c @@ -12,6 +12,7 @@ */ #include +#include #include "gk20a/gk20a.h" #include "gk20a/pmu_gk20a.h" @@ -289,11 +290,11 @@ static int gp106_load_falcon_ucode(struct gk20a *g, u32 falconidmask) return 0; } -void gp106_init_pmu_ops(struct gpu_ops *gops) +void gp106_init_pmu_ops(struct gk20a *g) { + struct gpu_ops *gops = &g->ops; gk20a_dbg_fn(""); - - if (gops->privsecurity) { + if (nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { gp106_init_secure_pmu(gops); gops->pmu.init_wpr_region = gm20b_pmu_init_acr; gops->pmu.load_lsfalcon_ucode = gp106_load_falcon_ucode; diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.h b/drivers/gpu/nvgpu/gp106/pmu_gp106.h index 5f399b89..68a00bb5 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.h +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.h @@ -17,7 +17,9 @@ #define gp106_dbg_pmu(fmt, arg...) \ gk20a_dbg(gpu_dbg_pmu, fmt, ##arg) -void gp106_init_pmu_ops(struct gpu_ops *gops); +struct gk20a; + +void gp106_init_pmu_ops(struct gk20a *g); void gp106_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id, struct pmu_pg_stats_data *pg_stat_data); bool gp106_pmu_is_engine_in_reset(struct gk20a *g); -- cgit v1.2.2