From 8fe633449f92d35b60a60de647a4e8fc1b5c8936 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Thu, 9 Nov 2017 14:13:25 -0800 Subject: gpu: nvgpu: Add check_priv_security fuse ops -New fuse ops is added to set NVGPU_SEC_PRIVSECURITY and NVGPU_SEC_SECUREGPCCS bits in g->enabled_flags during hal initialization -For igpu non simulation platforms, fuses are read to decide if gpu should be allowed to boot or not. --Do not boot gpu if priv_sec_en is set but wpr_enabled is not set to 1 or vpr_auto_fetch_disable is not set to 0 --With priv_sec_en set, all falcons have to boot in LS mode and this needs wpr_enabled set to 1 AND vpr_auto_fetch_disable set to 0. In this case gmmu tries to pull wpr and vpr settings from tegra mc Bug 2018223 Change-Id: Iceaa1b0b3214e9a3d6cef5d77a82e034302f748b Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1595454 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp106/fuse_gp106.c | 35 +++++++++++++++++++++++++++++++++++ drivers/gpu/nvgpu/gp106/fuse_gp106.h | 32 ++++++++++++++++++++++++++++++++ drivers/gpu/nvgpu/gp106/hal_gp106.c | 11 +++++++++-- 3 files changed, 76 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/nvgpu/gp106/fuse_gp106.c create mode 100644 drivers/gpu/nvgpu/gp106/fuse_gp106.h (limited to 'drivers/gpu/nvgpu/gp106') diff --git a/drivers/gpu/nvgpu/gp106/fuse_gp106.c b/drivers/gpu/nvgpu/gp106/fuse_gp106.c new file mode 100644 index 00000000..68c0db89 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/fuse_gp106.c @@ -0,0 +1,35 @@ +/* + * GP106 FUSE + * + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include + +#include "gk20a/gk20a.h" + +int gp106_fuse_check_priv_security(struct gk20a *g) +{ + __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true); + __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); + + return 0; +} diff --git a/drivers/gpu/nvgpu/gp106/fuse_gp106.h b/drivers/gpu/nvgpu/gp106/fuse_gp106.h new file mode 100644 index 00000000..dfb776b8 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/fuse_gp106.h @@ -0,0 +1,32 @@ +/* + * GP106 FUSE + * + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _NVGPU_GP106_FUSE +#define _NVGPU_GP106_FUSE + +struct gk20a; + +int gp106_fuse_check_priv_security(struct gk20a *g); + +#endif diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index e9ee77fc..d63398c7 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -79,6 +79,7 @@ #include "gp106/fb_gp106.h" #include "gp106/gp106_gating_reglist.h" #include "gp106/flcn_gp106.h" +#include "gp106/fuse_gp106.h" #include "hal_gp106.h" @@ -704,6 +705,9 @@ static const struct gpu_ops gp106_ops = { .priv_ring = { .isr = gp10b_priv_ring_isr, }, + .fuse = { + .check_priv_security = gp106_fuse_check_priv_security, + }, .get_litter_value = gp106_get_litter_value, .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, }; @@ -753,6 +757,7 @@ int gp106_init_hal(struct gk20a *g) gops->xve = gp106_ops.xve; gops->falcon = gp106_ops.falcon; gops->priv_ring = gp106_ops.priv_ring; + gops->fuse = gp106_ops.fuse; /* Lone functions */ gops->get_litter_value = gp106_ops.get_litter_value; @@ -760,11 +765,13 @@ int gp106_init_hal(struct gk20a *g) gp106_ops.chip_init_gpu_characteristics; __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); - __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true); - __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); + /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ + if (gops->fuse.check_priv_security(g)) + return -EINVAL; /* Do not boot gpu */ + g->pmu_lsf_pmu_wpr_init_done = 0; g->bootstrap_owner = LSF_FALCON_ID_SEC2; -- cgit v1.2.2