From 8a2be379cd25f2096ca63a50893688b8cf538691 Mon Sep 17 00:00:00 2001 From: Konsta Holtta Date: Tue, 31 May 2016 10:31:27 +0300 Subject: gpu: nvgpu: detect vidmem configuration from HW Read video memory size from hardware during initialization for devices that support it. JIRA DNVGPU-14 Change-Id: I84e1bca0eaac8dc204e1fb82628acc6b52c3e5cc Signed-off-by: Konsta Holtta Reviewed-on: http://git-master/r/1157212 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gp106/hal_gp106.c | 3 +- drivers/gpu/nvgpu/gp106/hw_fb_gp106.h | 16 +++++++++ drivers/gpu/nvgpu/gp106/hw_fbpa_gp106.h | 61 +++++++++++++++++++++++++++++++++ drivers/gpu/nvgpu/gp106/hw_top_gp106.h | 8 +++++ drivers/gpu/nvgpu/gp106/mm_gp106.c | 39 +++++++++++++++++++++ drivers/gpu/nvgpu/gp106/mm_gp106.h | 23 +++++++++++++ 6 files changed, 149 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/nvgpu/gp106/hw_fbpa_gp106.h create mode 100644 drivers/gpu/nvgpu/gp106/mm_gp106.c create mode 100644 drivers/gpu/nvgpu/gp106/mm_gp106.h (limited to 'drivers/gpu/nvgpu/gp106') diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 1dd16139..7ef72d72 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -39,6 +39,7 @@ #include "gm20b/pmu_gm20b.h" #include "gm20b/clk_gm20b.h" +#include "gp106/mm_gp106.h" #include "gp106/pmu_gp106.h" #include "gp106/gr_ctx_gp106.h" #include "gp106/gr_gp106.h" @@ -194,7 +195,7 @@ int gp106_init_hal(struct gk20a *g) gp10b_init_fifo(gops); gp10b_init_ce(gops); gp106_init_gr_ctx(gops); - gp10b_init_mm(gops); + gp106_init_mm(gops); gp106_init_pmu_ops(gops); gk20a_init_debug_ops(gops); gp10b_init_regops(gops); diff --git a/drivers/gpu/nvgpu/gp106/hw_fb_gp106.h b/drivers/gpu/nvgpu/gp106/hw_fb_gp106.h index 42d32ab3..1ab876cd 100644 --- a/drivers/gpu/nvgpu/gp106/hw_fb_gp106.h +++ b/drivers/gpu/nvgpu/gp106/hw_fb_gp106.h @@ -486,4 +486,20 @@ static inline u32 fb_niso_flush_sysmem_addr_r(void) { return 0x00100c10; } +static inline u32 fb_mmu_local_memory_range_r(void) +{ + return 0x00100ce0; +} +static inline u32 fb_mmu_local_memory_range_lower_scale_v(u32 r) +{ + return (r >> 0) & 0xf; +} +static inline u32 fb_mmu_local_memory_range_lower_mag_v(u32 r) +{ + return (r >> 4) & 0x3f; +} +static inline u32 fb_mmu_local_memory_range_ecc_mode_v(u32 r) +{ + return (r >> 30) & 0x1; +} #endif diff --git a/drivers/gpu/nvgpu/gp106/hw_fbpa_gp106.h b/drivers/gpu/nvgpu/gp106/hw_fbpa_gp106.h new file mode 100644 index 00000000..7f02eeb6 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/hw_fbpa_gp106.h @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +/* + * Function naming determines intended use: + * + * _r(void) : Returns the offset for register . + * + * _o(void) : Returns the offset for element . + * + * _w(void) : Returns the word offset for word (4 byte) element . + * + * __s(void) : Returns size of field of register in bits. + * + * __f(u32 v) : Returns a value based on 'v' which has been shifted + * and masked to place it at field of register . This value + * can be |'d with others to produce a full register value for + * register . + * + * __m(void) : Returns a mask for field of register . This + * value can be ~'d and then &'d to clear the value of field for + * register . + * + * ___f(void) : Returns the constant value after being shifted + * to place it at field of register . This value can be |'d + * with others to produce a full register value for . + * + * __v(u32 r) : Returns the value of field from a full register + * value 'r' after being shifted to place its LSB at bit 0. + * This value is suitable for direct comparison with other unshifted + * values appropriate for use in field of register . + * + * ___v(void) : Returns the constant value for defined for + * field of register . This value is suitable for direct + * comparison with unshifted values appropriate for use in field + * of register . + */ +#ifndef _hw_fbpa_gp106_h_ +#define _hw_fbpa_gp106_h_ + +static inline u32 fbpa_cstatus_r(void) +{ + return 0x009a020c; +} +static inline u32 fbpa_cstatus_ramamount_v(u32 r) +{ + return (r >> 0) & 0x1ffff; +} +#endif diff --git a/drivers/gpu/nvgpu/gp106/hw_top_gp106.h b/drivers/gpu/nvgpu/gp106/hw_top_gp106.h index e833c152..85350954 100644 --- a/drivers/gpu/nvgpu/gp106/hw_top_gp106.h +++ b/drivers/gpu/nvgpu/gp106/hw_top_gp106.h @@ -74,6 +74,14 @@ static inline u32 top_num_fbps_value_v(u32 r) { return (r >> 0) & 0x1f; } +static inline u32 top_num_fbpas_r(void) +{ + return 0x0002243c; +} +static inline u32 top_num_fbpas_value_v(u32 r) +{ + return (r >> 0) & 0x1f; +} static inline u32 top_ltc_per_fbp_r(void) { return 0x00022450; diff --git a/drivers/gpu/nvgpu/gp106/mm_gp106.c b/drivers/gpu/nvgpu/gp106/mm_gp106.c new file mode 100644 index 00000000..1a4b6dd1 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/mm_gp106.c @@ -0,0 +1,39 @@ +/* + * GP106 memory management + * + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "gk20a/gk20a.h" +#include "gp10b/mm_gp10b.h" + +#include "hw_fb_gp106.h" + +static size_t gp106_mm_get_vidmem_size(struct gk20a *g) +{ + u32 range = gk20a_readl(g, fb_mmu_local_memory_range_r()); + u32 mag = fb_mmu_local_memory_range_lower_mag_v(range); + u32 scale = fb_mmu_local_memory_range_lower_scale_v(range); + u32 ecc = fb_mmu_local_memory_range_ecc_mode_v(range); + size_t bytes = ((size_t)mag << scale) * SZ_1M; + + if (ecc) + bytes = bytes / 16 * 15; + + return bytes; +} + +void gp106_init_mm(struct gpu_ops *gops) +{ + gp10b_init_mm(gops); + gops->mm.get_vidmem_size = gp106_mm_get_vidmem_size; +} diff --git a/drivers/gpu/nvgpu/gp106/mm_gp106.h b/drivers/gpu/nvgpu/gp106/mm_gp106.h new file mode 100644 index 00000000..36a89a11 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/mm_gp106.h @@ -0,0 +1,23 @@ +/* + * GP106 memory management + * + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MM_GP106_H +#define MM_GP106_H + +struct gpu_ops; + +void gp106_init_mm(struct gpu_ops *gops); + +#endif -- cgit v1.2.2