From 6431ec360bf7b7baf6dd687b1525c40114ede189 Mon Sep 17 00:00:00 2001 From: Sunny He Date: Wed, 26 Jul 2017 10:47:16 -0700 Subject: gpu: nvgpu: Reorg gr_ctx HAL initialization Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the gr_ctx sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I783d8e8919d8694ad2aa0d285e4c5a2b62580f48 Signed-off-by: Sunny He Reviewed-on: https://git-master.nvidia.com/r/1527417 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp106/gr_ctx_gp106.c | 13 +++---------- drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h | 5 +++-- drivers/gpu/nvgpu/gp106/hal_gp106.c | 8 ++++++-- 3 files changed, 12 insertions(+), 14 deletions(-) (limited to 'drivers/gpu/nvgpu/gp106') diff --git a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.c b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.c index 3a49cc60..706ff7e0 100644 --- a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.c +++ b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.c @@ -1,7 +1,7 @@ /* * GP106 Graphics Context * - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -16,7 +16,7 @@ #include "gk20a/gk20a.h" #include "gr_ctx_gp106.h" -static int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name) +int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name) { u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl; @@ -36,14 +36,7 @@ static int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name) return 0; } -static bool gr_gp106_is_firmware_defined(void) +bool gr_gp106_is_firmware_defined(void) { return true; } - -void gp106_init_gr_ctx(struct gpu_ops *gops) -{ - gops->gr_ctx.get_netlist_name = gr_gp106_get_netlist_name; - gops->gr_ctx.is_fw_defined = gr_gp106_is_firmware_defined; - gops->gr_ctx.use_dma_for_fw_bootstrap = false; -} diff --git a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h index fef80abb..f1162f5e 100644 --- a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h +++ b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -22,6 +22,7 @@ #define GP106_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_C #define GP104_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_D -void gp106_init_gr_ctx(struct gpu_ops *gops); +int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name); +bool gr_gp106_is_firmware_defined(void); #endif /*__GR_CTX_GP106_H__*/ diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 227b22e6..763dab44 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -313,6 +313,10 @@ static const struct gpu_ops gp106_ops = { .resetup_ramfc = gp10b_fifo_resetup_ramfc, .device_info_fault_id = top_device_info_data_fault_id_enum_v, }, + .gr_ctx = { + .get_netlist_name = gr_gp106_get_netlist_name, + .is_fw_defined = gr_gp106_is_firmware_defined, + }, .mc = { .intr_enable = mc_gp10b_intr_enable, .intr_unit_config = mc_gp10b_intr_unit_config, @@ -403,6 +407,7 @@ int gp106_init_hal(struct gk20a *g) gops->ce2 = gp106_ops.ce2; gops->clock_gating = gp106_ops.clock_gating; gops->fifo = gp106_ops.fifo; + gops->gr_ctx = gp106_ops.gr_ctx; gops->mc = gp106_ops.mc; gops->debug = gp106_ops.debug; gops->dbg_session_ops = gp106_ops.dbg_session_ops; @@ -421,6 +426,7 @@ int gp106_init_hal(struct gk20a *g) gp106_ops.chip_init_gpu_characteristics; gops->bios_init = gp106_ops.bios_init; + __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true); __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); @@ -429,7 +435,6 @@ int gp106_init_hal(struct gk20a *g) gp106_init_gr(g); gp10b_init_fecs_trace_ops(gops); gp106_init_fb(gops); - gp106_init_gr_ctx(gops); gp106_init_mm(gops); gp106_init_pmu_ops(g); gp106_init_clk_ops(gops); @@ -439,7 +444,6 @@ int gp106_init_hal(struct gk20a *g) gp106_init_therm_ops(gops); g->name = "gp10x"; - gops->gr_ctx.use_dma_for_fw_bootstrap = true; c->twod_class = FERMI_TWOD_A; c->threed_class = PASCAL_B; -- cgit v1.2.2