From bb6923908a2873b079ad67d22c9fcb014c00af28 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Tue, 6 Sep 2016 16:13:31 +0530 Subject: gpu: nvgpu: select target based on aperture For bar2 and pmu instance blocks, use gk20a_aperture_mask() to select target address (i.e. if address is in sysmem or vidmem) based on aperture Also add target accessors for gr_fecs_new_ctx and gr_fecs_arb_ctx_ptr Jira DNVGPU-22 Change-Id: Ieaa80bd83a4191fe57b7fba6e0f9cdaeb195a077 Signed-off-by: Deepak Nibade Reviewed-on: http://git-master/r/1216138 (cherry picked from commit 7a9f4175abc5dddf0879215de4637b7b6eb0ab7b) Reviewed-on: http://git-master/r/1219712 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gp106/sec2_gp106.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gp106/sec2_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c index f8b32f8f..8f34edd1 100644 --- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c +++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c @@ -169,7 +169,9 @@ int bl_bootstrap_sec2(struct pmu_gk20a *pmu, pwr_pmu_new_instblk_ptr_f( gk20a_mm_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | pwr_pmu_new_instblk_valid_f(1) | - pwr_pmu_new_instblk_target_sys_coh_f()); + gk20a_aperture_mask(g, &mm->pmu.inst_block, + pwr_pmu_new_instblk_target_sys_coh_f(), + pwr_pmu_new_instblk_target_fb_f())); data = gk20a_readl(g, psec_falcon_debug1_r()); data |= psec_falcon_debug1_ctxsw_mode_m(); @@ -313,7 +315,9 @@ void init_pmu_setup_hw1(struct gk20a *g) pwr_pmu_new_instblk_ptr_f( gk20a_mm_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | pwr_pmu_new_instblk_valid_f(1) | - pwr_pmu_new_instblk_target_sys_coh_f()); + gk20a_aperture_mask(g, &mm->pmu.inst_block, + pwr_pmu_new_instblk_target_sys_coh_f(), + pwr_pmu_new_instblk_target_fb_f())); /*Copying pmu cmdline args*/ g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, -- cgit v1.2.2