From d2b67f1ad606733a63d8261e36068e5bd1f96cdc Mon Sep 17 00:00:00 2001 From: David Nieto Date: Mon, 8 Aug 2016 03:13:37 -0700 Subject: gpu: nvgpu: add debugfs to dump clocks * Removed unused registers from headers * Added counter based MCLK * Removed hardcoding JIRA DNVGPU-98 Change-Id: Idffcd7fc17024582b41c29371a2295df8f0c206b Signed-off-by: David Nieto Reviewed-on: http://git-master/r/1204019 (cherry picked from commit 48dfa41a641c3adbc4d25a35f418cf73b08d5e8c) Reviewed-on: http://git-master/r/1227264 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gp106/hw_trim_gp106.h | 189 ++++++++++++++++++++++++++++++++ 1 file changed, 189 insertions(+) create mode 100644 drivers/gpu/nvgpu/gp106/hw_trim_gp106.h (limited to 'drivers/gpu/nvgpu/gp106/hw_trim_gp106.h') diff --git a/drivers/gpu/nvgpu/gp106/hw_trim_gp106.h b/drivers/gpu/nvgpu/gp106/hw_trim_gp106.h new file mode 100644 index 00000000..42d3fd32 --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/hw_trim_gp106.h @@ -0,0 +1,189 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +/* + * Function naming determines intended use: + * + * _r(void) : Returns the offset for register . + * + * _o(void) : Returns the offset for element . + * + * _w(void) : Returns the word offset for word (4 byte) element . + * + * __s(void) : Returns size of field of register in bits. + * + * __f(u32 v) : Returns a value based on 'v' which has been shifted + * and masked to place it at field of register . This value + * can be |'d with others to produce a full register value for + * register . + * + * __m(void) : Returns a mask for field of register . This + * value can be ~'d and then &'d to clear the value of field for + * register . + * + * ___f(void) : Returns the constant value after being shifted + * to place it at field of register . This value can be |'d + * with others to produce a full register value for . + * + * __v(u32 r) : Returns the value of field from a full register + * value 'r' after being shifted to place its LSB at bit 0. + * This value is suitable for direct comparison with other unshifted + * values appropriate for use in field of register . + * + * ___v(void) : Returns the constant value for defined for + * field of register . This value is suitable for direct + * comparison with unshifted values appropriate for use in field + * of register . + */ +#ifndef _hw_trim_gp106_h_ +#define _hw_trim_gp106_h_ +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_r(void) +{ + return 0x00132924; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_noofipclks_s(void) +{ + return 16; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_noofipclks_f(u32 v) +{ + return (v & 0xffff) << 0; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_noofipclks_m(void) +{ + return 0xffff << 0; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_noofipclks_v(u32 r) +{ + return (r >> 0) & 0xffff; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_write_en_s(void) +{ + return 1; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_write_en_f(u32 v) +{ + return (v & 0x1) << 16; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_write_en_m(void) +{ + return 0x1 << 16; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_write_en_v(u32 r) +{ + return (r >> 16) & 0x1; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_write_en_deasserted_f(void) +{ + return 0; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_write_en_asserted_f(void) +{ + return 0x10000; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_enable_s(void) +{ + return 1; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_enable_f(u32 v) +{ + return (v & 0x1) << 20; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_enable_m(void) +{ + return 0x1 << 20; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_enable_v(u32 r) +{ + return (r >> 20) & 0x1; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_enable_deasserted_f(void) +{ + return 0; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_enable_asserted_f(void) +{ + return 0x100000; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_reset_s(void) +{ + return 1; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_reset_f(u32 v) +{ + return (v & 0x1) << 24; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_reset_m(void) +{ + return 0x1 << 24; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_reset_v(u32 r) +{ + return (r >> 24) & 0x1; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_reset_deasserted_f(void) +{ + return 0; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_reset_asserted_f(void) +{ + return 0x1000000; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_source_gpc2clk_f(void) +{ + return 0x70000000; +} +static inline u32 trim_gpc_bcast_clk_cntr_ncgpcclk_cnt_r(void) +{ + return 0x00132928; +} +static inline u32 trim_fbpa_bcast_clk_cntr_ncltcclk_cfg_r(void) +{ + return 0x00132128; +} +static inline u32 trim_fbpa_bcast_clk_cntr_ncltcclk_cfg_source_dramdiv4_rec_clk1_f(void) +{ + return 0x20000000; +} +static inline u32 trim_fbpa_bcast_clk_cntr_ncltcclk_cnt_r(void) +{ + return 0x0013212c; +} +static inline u32 trim_sys_clk_cntr_ncltcpll_cfg_r(void) +{ + return 0x001373c0; +} +static inline u32 trim_sys_clk_cntr_ncltcpll_cfg_source_xbar2clk_f(void) +{ + return 0x20000000; +} +static inline u32 trim_sys_clk_cntr_ncltcpll_cnt_r(void) +{ + return 0x001373c4; +} +static inline u32 trim_sys_clk_cntr_ncsyspll_cfg_r(void) +{ + return 0x001373b0; +} +static inline u32 trim_sys_clk_cntr_ncsyspll_cfg_source_sys2clk_f(void) +{ + return 0x0; +} +static inline u32 trim_sys_clk_cntr_ncsyspll_cnt_r(void) +{ + return 0x001373b4; +} + +#endif -- cgit v1.2.2