From ae809fddbe90bcec0d48e1213fa36cc5ba76550d Mon Sep 17 00:00:00 2001 From: Vaikundanathan S Date: Tue, 28 Aug 2018 11:58:25 +0530 Subject: gpu:nvgpu: Add GV10x perf event In case of VFE update, schedule work to set P0 clocks. Added function nvgpu_clk_set_fll_clk_gv10x to update P0 clocks on perf event. Fixed MISRA issues caused by this excluding external functions and MACROs Bug 2331655 Change-Id: Id96c473092ee7f0b651413aefdd4b6f2f59e0b12 Signed-off-by: Vaikundanathan S Reviewed-on: https://git-master.nvidia.com/r/1808014 Reviewed-on: https://git-master.nvidia.com/r/1813881 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp106/hal_gp106.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index d3804f0e..063fbbe3 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -676,6 +676,7 @@ static const struct gpu_ops gp106_ops = { .mclk_init = gp106_mclk_init, .mclk_change = gp106_mclk_change, .mclk_deinit = gp106_mclk_deinit, + .perf_pmu_vfe_load = perf_pmu_vfe_load, }, .clk_arb = { .get_arbiter_clk_domains = gp106_get_arbiter_clk_domains, @@ -844,6 +845,7 @@ int gp106_init_hal(struct gk20a *g) gops->clk.mclk_change = gp106_ops.clk.mclk_change; gops->clk.mclk_deinit = gp106_ops.clk.mclk_deinit; gops->clk.clk_domain_get_f_points = gp106_ops.clk.clk_domain_get_f_points; + gops->clk.perf_pmu_vfe_load = gp106_ops.clk.perf_pmu_vfe_load; gops->clk_arb = gp106_ops.clk_arb; gops->regops = gp106_ops.regops; -- cgit v1.2.2