From ae175e45edc5807131dfb1b63d3e4795e96a3f86 Mon Sep 17 00:00:00 2001 From: Divya Singhatwaria Date: Tue, 23 Jul 2019 10:43:35 +0530 Subject: gpu: nvgpu: Use TPC_PG_MASK to powergate the TPC - In GV11B, read fuse_status_opt_tpc_gpc register to read which TPCs are floorswept. - The driver will also read sysfs node: tpc_pg_mask - Based on these two values "can_tpc_powergate" will be set to true or false and mask will be used to write to fuse_ctrl_opt_tpc_gpc register to powergate the TPC. - can_tpc_powergate = true indicates that the mask value sent from userspace is valid and can be used to power gate the desired TPC - can_tpc_powergate = false indicates that the mask value sent from userspace is not valid and cannot be used to power gate the desired TPC. Bug 200532639 Change-Id: Ib0806e4c96305a13b3574e8063ad8e16770aa7cd Signed-off-by: Divya Singhatwaria Reviewed-on: https://git-master.nvidia.com/r/2159219 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp106/hal_gp106.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 86a133d5..d033a516 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -815,6 +815,9 @@ static const struct gpu_ops gp106_ops = { .acr = { .acr_sw_init = nvgpu_gp106_acr_sw_init, }, + .tpc = { + .tpc_powergate = NULL, + }, .get_litter_value = gp106_get_litter_value, .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, }; @@ -870,6 +873,7 @@ int gp106_init_hal(struct gk20a *g) gops->falcon = gp106_ops.falcon; gops->priv_ring = gp106_ops.priv_ring; gops->fuse = gp106_ops.fuse; + gops->tpc = gp106_ops.tpc; gops->acr = gp106_ops.acr; /* Lone functions */ -- cgit v1.2.2