From a8cf64019f74dd05626a911af3df079efd9c7c89 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 1 May 2017 15:31:00 -0700 Subject: gpu: nvgpu: Introduce priv ring HAL and define ISR Introduce a priv ring HAL and define ISR as the only function in it. Introduce a gp10b version of the ISR that writes error message to UART for every priv ring error, and leave the old chips with silent error handling. Bug 1846641 Change-Id: I73e38396205ac7bb7b8488b7fbca3ff67a3db3bb Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1473696 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp106/hal_gp106.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index e39843ac..3f64283a 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -27,6 +27,7 @@ #include "gp10b/ce_gp10b.h" #include "gp10b/regops_gp10b.h" #include "gp10b/cde_gp10b.h" +#include "gp10b/priv_ring_gp10b.h" #include "gp106/fifo_gp106.h" #include "gp106/regops_gp106.h" @@ -232,6 +233,7 @@ int gp106_init_hal(struct gk20a *g) gops->pmupstate = true; gk20a_init_bus(gops); gp10b_init_mc(gops); + gp10b_init_priv_ring(gops); gp106_init_gr(gops); gp10b_init_fecs_trace_ops(gops); gp106_init_ltc(gops); -- cgit v1.2.2