From 959c02d6757c3c40748f7d2db1515885a5066a12 Mon Sep 17 00:00:00 2001 From: Sunny He Date: Mon, 31 Jul 2017 18:54:38 -0700 Subject: gpu: nvgpu: Reorg mm HAL initialization Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the mm sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: Ieb87a62f047510e51c52e6563d8e3fd5a65b5f28 Signed-off-by: Sunny He Reviewed-on: https://git-master.nvidia.com/r/1537753 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gp106/hal_gp106.c | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 361a7b0f..6a50be34 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -17,6 +17,7 @@ #include "gk20a/fifo_gk20a.h" #include "gk20a/ctxsw_trace_gk20a.h" #include "gk20a/fecs_trace_gk20a.h" +#include "gk20a/mm_gk20a.h" #include "gk20a/dbg_gpu_gk20a.h" #include "gk20a/css_gr_gk20a.h" #include "gk20a/bus_gk20a.h" @@ -44,6 +45,7 @@ #include "gm20b/ltc_gm20b.h" #include "gm20b/gr_gm20b.h" #include "gm20b/fifo_gm20b.h" +#include "gm20b/mm_gm20b.h" #include "gm20b/pmu_gm20b.h" #include "gm20b/fb_gm20b.h" @@ -356,6 +358,31 @@ static const struct gpu_ops gp106_ops = { .max_entries = gk20a_gr_max_entries, }, #endif /* CONFIG_GK20A_CTXSW_TRACE */ + .mm = { + .support_sparse = gm20b_mm_support_sparse, + .gmmu_map = gk20a_locked_gmmu_map, + .gmmu_unmap = gk20a_locked_gmmu_unmap, + .vm_bind_channel = gk20a_vm_bind_channel, + .fb_flush = gk20a_mm_fb_flush, + .l2_invalidate = gk20a_mm_l2_invalidate, + .l2_flush = gk20a_mm_l2_flush, + .cbc_clean = gk20a_mm_cbc_clean, + .set_big_page_size = gm20b_mm_set_big_page_size, + .get_big_page_sizes = gm20b_mm_get_big_page_sizes, + .get_default_big_page_size = gp10b_mm_get_default_big_page_size, + .gpu_phys_addr = gm20b_gpu_phys_addr, + .get_physical_addr_bits = NULL, + .get_mmu_levels = gp10b_mm_get_mmu_levels, + .init_pdb = gp10b_mm_init_pdb, + .init_mm_setup_hw = gp10b_init_mm_setup_hw, + .is_bar1_supported = gm20b_mm_is_bar1_supported, + .init_inst_block = gk20a_init_inst_block, + .mmu_fault_pending = gk20a_fifo_mmu_fault_pending, + .init_bar2_vm = gb10b_init_bar2_vm, + .init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup, + .remove_bar2_vm = gp10b_remove_bar2_vm, + .get_vidmem_size = gp106_mm_get_vidmem_size, + }, .pramin = { .enter = gk20a_pramin_enter, .exit = gk20a_pramin_exit, @@ -502,6 +529,7 @@ int gp106_init_hal(struct gk20a *g) gops->fifo = gp106_ops.fifo; gops->gr_ctx = gp106_ops.gr_ctx; gops->fecs_trace = gp106_ops.fecs_trace; + gops->mm = gp106_ops.mm; gops->pramin = gp106_ops.pramin; gops->therm = gp106_ops.therm; /* @@ -543,7 +571,6 @@ int gp106_init_hal(struct gk20a *g) g->bootstrap_owner = LSF_FALCON_ID_SEC2; gp106_init_gr(g); - gp106_init_mm(gops); gp106_init_pmu_ops(g); gp10b_init_uncompressed_kind_map(); -- cgit v1.2.2