From 8a64eea483d18ce603b049d5485e9f7a742da30b Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Mon, 26 Mar 2018 11:42:42 -0700 Subject: gpu: nvgpu: fix priv error register reads Current code does not compute priv error register offsets properly. This leads to invalid decoding of priv errors, and can also trigger additional priv errors. - add GPU_LIT_GPC_PRIV_STRIDE define - return proj_gpc_priv_stride for GPU_LIT_GPC_PRIV_STRIDE in hals - use GPU_LIT_GPC_PRIV_STRIDE instead of GPU_LIT_GPC_STRIDE in g->ops.priv_ring.isr() to compute priv error register offsets. Bug 2093058 Change-Id: Ia7c36ccba0441126784bb0e00452f2cf1196ef71 Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/1682118 Reviewed-by: svc-mobile-coverity Reviewed-by: Seema Khowala GVS: Gerrit_Virtual_Submit Tested-by: Seema Khowala Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gp106/hal_gp106.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 84e72e98..dbea8033 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -198,6 +198,9 @@ static int gp106_get_litter_value(struct gk20a *g, int value) case GPU_LIT_DMA_COPY_CLASS: ret = PASCAL_DMA_COPY_A; break; + case GPU_LIT_GPC_PRIV_STRIDE: + ret = proj_gpc_priv_stride_v(); + break; default: BUG(); break; -- cgit v1.2.2