From 3d9c33c5953e383527c7e4af594adfe0c82b5788 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Tue, 13 Sep 2016 14:23:45 -0700 Subject: gpu: nvgpu: clk arbiter skeleton Add clock arbiter skeleton with support of clock sessions, notifications on clock changes, request numbering, and asynchronous handling of clock requests. Provides minimum behaviour to allow unit tests implementation. Actual arbitration and clock settings will be done separately. For now, dummy arbiter keeps last requested target mhz. Actual arbiter may move to a lockless implementation. Jira DNVGPU-125 Change-Id: I6a8e443fb0d15dc5f1993e7260256d71acddd106 Signed-off-by: Thomas Fleury Reviewed-on: http://git-master/r/1223476 (cherry picked from commit cb130825d84e4124d273bd443e2b62d493377461) Reviewed-on: http://git-master/r/1243105 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gp106/clk_arb_gp106.c | 95 +++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 drivers/gpu/nvgpu/gp106/clk_arb_gp106.c (limited to 'drivers/gpu/nvgpu/gp106/clk_arb_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c new file mode 100644 index 00000000..d1cbb32b --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "gk20a/gk20a.h" + +#include "clk/clk_arb.h" +#include "clk_arb_gp106.h" + +static u32 gp106_get_arbiter_clk_domains(struct gk20a *g) +{ + (void)g; + return (CTRL_CLK_DOMAIN_MCLK|CTRL_CLK_DOMAIN_GPC2CLK); +} + +static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, + u16 *min_mhz, u16 *max_mhz) +{ + enum nv_pmu_clk_clkwhich clkwhich; + struct clk_set_info *p0_info; + struct clk_set_info *p5_info; + + switch (api_domain) { + case CTRL_CLK_DOMAIN_MCLK: + clkwhich = clkwhich_mclk; + break; + + case CTRL_CLK_DOMAIN_GPC2CLK: + clkwhich = clkwhich_gpc2clk; + break; + + default: + return -EINVAL; + } + + p5_info = pstate_get_clk_set_info(g, + CTRL_PERF_PSTATE_P5, clkwhich); + if (!p5_info) + return -EINVAL; + + p0_info = pstate_get_clk_set_info(g, + CTRL_PERF_PSTATE_P0, clkwhich); + if (!p0_info) + return -EINVAL; + + *min_mhz = p5_info->min_mhz; + *max_mhz = p0_info->max_mhz; + + return 0; +} + +static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, + u16 *default_mhz) +{ + enum nv_pmu_clk_clkwhich clkwhich; + struct clk_set_info *p0_info; + + switch (api_domain) { + case CTRL_CLK_DOMAIN_MCLK: + clkwhich = clkwhich_mclk; + break; + + case CTRL_CLK_DOMAIN_GPC2CLK: + clkwhich = clkwhich_gpc2clk; + break; + + default: + return -EINVAL; + } + + p0_info = pstate_get_clk_set_info(g, + CTRL_PERF_PSTATE_P0, clkwhich); + if (!p0_info) + return -EINVAL; + + *default_mhz = p0_info->max_mhz; + + return 0; +} + +void gp106_init_clk_arb_ops(struct gpu_ops *gops) +{ + gops->clk_arb.get_arbiter_clk_domains = gp106_get_arbiter_clk_domains; + gops->clk_arb.get_arbiter_clk_range = gp106_get_arbiter_clk_range; + gops->clk_arb.get_arbiter_clk_default = gp106_get_arbiter_clk_default; +} -- cgit v1.2.2 From 7a8b12ab634c05cd39c08e704c28ee3f4e111c7f Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Fri, 30 Sep 2016 16:40:29 -0700 Subject: gpu: nvgpu: clk requests completion and event fds Install one completion fd per SET request. Notifications on dedicated event fd. Changed frequencies unit to Hz from MHz. Remove sequence numbers from dummy arbiter. Added effective clock type (query frequency from counters). Jira DNVGPU-125 Change-Id: Id5445c6ae1d6bf06f7f59c82ff6c5d3b34e26483 Signed-off-by: Thomas Fleury Reviewed-on: http://git-master/r/1230239 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom (cherry picked from commit d17083f4ceb69725c661678607a3e43148d38560) Reviewed-on: http://git-master/r/1243106 --- drivers/gpu/nvgpu/gp106/clk_arb_gp106.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/nvgpu/gp106/clk_arb_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c index d1cbb32b..112cb588 100644 --- a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c +++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c @@ -23,7 +23,7 @@ static u32 gp106_get_arbiter_clk_domains(struct gk20a *g) } static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, - u16 *min_mhz, u16 *max_mhz) + u64 *min_hz, u64 *max_hz) { enum nv_pmu_clk_clkwhich clkwhich; struct clk_set_info *p0_info; @@ -52,14 +52,14 @@ static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, if (!p0_info) return -EINVAL; - *min_mhz = p5_info->min_mhz; - *max_mhz = p0_info->max_mhz; + *min_hz = (u64)(p5_info->min_mhz) * (u64)MHZ; + *max_hz = (u64)(p0_info->max_mhz) * (u64)MHZ; return 0; } static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, - u16 *default_mhz) + u64 *default_hz) { enum nv_pmu_clk_clkwhich clkwhich; struct clk_set_info *p0_info; @@ -82,7 +82,7 @@ static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, if (!p0_info) return -EINVAL; - *default_mhz = p0_info->max_mhz; + *default_hz = (u64)p0_info->max_mhz * (u64)MHZ; return 0; } -- cgit v1.2.2 From c4bb19d46e1c9121a0948fa506098cbf2f64e2a6 Mon Sep 17 00:00:00 2001 From: David Nieto Date: Fri, 7 Oct 2016 16:25:04 -0700 Subject: nvgpu: gpu: arbiter for vf switch management JIRA DNVGPU-143 The arbiter is charged with selecting the proper frequencies when multiple applications submit simultaneously clock change requests On the current implementation, the arbiter guarantees that the selected frequency will be always higher or equal to the request, as long as the request is in range. The current code is not yet realtime friendly, as requests are not pre-allocated. Summary of changes: (1) pstate/vf switch no longer selects boot frequency (2) changed mclk code change to accept input freq (3) added arbiter (4) now a single session can submit concurrent requests the last request is the one that applies for that session (5) modified locking mechanism to reduce lock contention (6) Added callback to notify the arbiter that the VF table has changed and is no longer valid (PMU/Thermals must call this when VF table is invalid) (7) changed internal API to work with MHz (8) added debugfs for stats Change-Id: I6a7b05c9447761e8536f84ef86b5ab0793164d63 Signed-off-by: David Nieto Reviewed-on: http://git-master/r/1239461 Reviewed-by: Thomas Fleury GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-on: http://git-master/r/1267120 Reviewed-by: Automatic_Commit_Validation_User --- drivers/gpu/nvgpu/gp106/clk_arb_gp106.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/nvgpu/gp106/clk_arb_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c index 112cb588..d1cbb32b 100644 --- a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c +++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c @@ -23,7 +23,7 @@ static u32 gp106_get_arbiter_clk_domains(struct gk20a *g) } static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, - u64 *min_hz, u64 *max_hz) + u16 *min_mhz, u16 *max_mhz) { enum nv_pmu_clk_clkwhich clkwhich; struct clk_set_info *p0_info; @@ -52,14 +52,14 @@ static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, if (!p0_info) return -EINVAL; - *min_hz = (u64)(p5_info->min_mhz) * (u64)MHZ; - *max_hz = (u64)(p0_info->max_mhz) * (u64)MHZ; + *min_mhz = p5_info->min_mhz; + *max_mhz = p0_info->max_mhz; return 0; } static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, - u64 *default_hz) + u16 *default_mhz) { enum nv_pmu_clk_clkwhich clkwhich; struct clk_set_info *p0_info; @@ -82,7 +82,7 @@ static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, if (!p0_info) return -EINVAL; - *default_hz = (u64)p0_info->max_mhz * (u64)MHZ; + *default_mhz = p0_info->max_mhz; return 0; } -- cgit v1.2.2 From cd25b202361ace2a04594de38a48f66aa75e1cb8 Mon Sep 17 00:00:00 2001 From: David Nieto Date: Thu, 10 Nov 2016 17:12:33 -0800 Subject: gpu: nvgpu: cap minimum gpc clocks to HW limits JIRA: DNVGPU-180 Change-Id: I1928e77cea4ac87bf2ba2b6b7b2f2942dfb97de9 Signed-off-by: David Nieto Reviewed-on: http://git-master/r/1251493 (cherry picked from commit 7b8a105652a3169d9ec0cb7ce52c3b92e42ca310) Reviewed-on: http://git-master/r/1274545 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Thomas Fleury Reviewed-by: Vijayakumar Subbu GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gp106/clk_arb_gp106.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gp106/clk_arb_gp106.c') diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c index d1cbb32b..b4d1afbc 100644 --- a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c +++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c @@ -28,6 +28,9 @@ static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, enum nv_pmu_clk_clkwhich clkwhich; struct clk_set_info *p0_info; struct clk_set_info *p5_info; + struct avfsfllobjs *pfllobjs = &(g->clk_pmu.avfs_fllobjs); + + u16 limit_min_mhz; switch (api_domain) { case CTRL_CLK_DOMAIN_MCLK: @@ -52,7 +55,14 @@ static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, if (!p0_info) return -EINVAL; - *min_mhz = p5_info->min_mhz; + limit_min_mhz = p5_info->min_mhz; + /* WAR for DVCO min */ + if (api_domain == CTRL_CLK_DOMAIN_GPC2CLK) + if ((pfllobjs->max_min_freq_mhz) && + (pfllobjs->max_min_freq_mhz > limit_min_mhz)) + limit_min_mhz = pfllobjs->max_min_freq_mhz; + + *min_mhz = limit_min_mhz; *max_mhz = p0_info->max_mhz; return 0; -- cgit v1.2.2