From f0a9ce0469314711ddb5a8baf6bf88615b71c59e Mon Sep 17 00:00:00 2001 From: Adeel Raza Date: Thu, 25 Jun 2015 15:40:12 -0700 Subject: gpu: nvgpu: SM/TEX exception handling support Add TEX exception handling support. Also make SM exception handler into a function pointer, which should allow different chips to implement their own SM exception handling routine. Bug 1635727 Bug 1637486 Change-Id: I429905726c1840c11e83780843d82729495dc6a5 Signed-off-by: Adeel Raza Reviewed-on: http://git-master/r/935329 --- drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 2 ++ drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h | 20 ++++++++++++++++++++ 2 files changed, 22 insertions(+) (limited to 'drivers/gpu/nvgpu/gm20b') diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index a80cef8f..ab1b166d 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -1229,4 +1229,6 @@ void gm20b_init_gr(struct gpu_ops *gops) gops->gr.get_access_map = gr_gm20b_get_access_map; gops->gr.handle_fecs_error = gk20a_gr_handle_fecs_error; gops->gr.mask_hww_warp_esr = gk20a_mask_hww_warp_esr; + gops->gr.handle_sm_exception = gr_gk20a_handle_sm_exception; + gops->gr.handle_tex_exception = gr_gk20a_handle_tex_exception; } diff --git a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h index 41a7c885..7a19e4ab 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h @@ -3022,6 +3022,10 @@ static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_en_sm_enabled_f(void) { return 0x2; } +static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_en_tex_enabled_f(void) +{ + return 0x1; +} static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_en_r(void) { return 0x0050450c; @@ -3058,6 +3062,14 @@ static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_r(void) { return 0x00504508; } +static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_tex_v(u32 r) +{ + return (r >> 0) & 0x1; +} +static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_tex_pending_v(void) +{ + return 0x00000001; +} static inline u32 gr_gpc0_tpc0_tpccs_tpc_exception_sm_v(u32 r) { return (r >> 1) & 0x1; @@ -3214,6 +3226,14 @@ static inline u32 gr_gpc0_tpc0_sm_hww_global_esr_single_step_complete_pending_f( { return 0x40; } +static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_r(void) +{ + return 0x00504224; +} +static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_intr_pending_f(void) +{ + return 0x1; +} static inline u32 gr_gpc0_tpc0_sm_hww_warp_esr_r(void) { return 0x00504648; -- cgit v1.2.2