From b3f575074b66e8af1a9943874f9782b793fa7edc Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Tue, 4 Nov 2014 18:44:28 +0530 Subject: gpu: nvgpu: fix sparse warnings Fix below sparse warnings : warning: Using plain integer as NULL pointer warning: symbol was not declared. Should it be static? warning: Initializer entry defined twice Also, remove dead functions Bug 1573254 Change-Id: I29d71ecc01c841233cf6b26c9088ca8874773469 Signed-off-by: Deepak Nibade Reviewed-on: http://git-master/r/593363 Reviewed-by: Amit Sharma (SW-TEGRA) Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam --- drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 16 +++--- drivers/gpu/nvgpu/gm20b/fb_gm20b.c | 2 +- drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c | 78 ++++++++------------------ drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.c | 2 +- drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 2 +- drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 2 +- drivers/gpu/nvgpu/gm20b/ltc_gm20b.c | 6 +- drivers/gpu/nvgpu/gm20b/mm_gm20b.c | 7 ++- drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | 8 +-- drivers/gpu/nvgpu/gm20b/regops_gm20b.c | 27 ++++----- 10 files changed, 61 insertions(+), 89 deletions(-) (limited to 'drivers/gpu/nvgpu/gm20b') diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 50b495a6..470a93bc 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c @@ -55,13 +55,13 @@ static void free_acr_resources(struct gk20a *g, struct ls_flcn_mgr *plsfm); /*Globals*/ static void __iomem *mc = IO_ADDRESS(TEGRA_MC_BASE); -get_ucode_details pmu_acr_supp_ucode_list[] = { +static get_ucode_details pmu_acr_supp_ucode_list[] = { pmu_ucode_details, fecs_ucode_details, }; /*Once is LS mode, cpuctl_alias is only accessible*/ -void start_gm20b_pmu(struct gk20a *g) +static void start_gm20b_pmu(struct gk20a *g) { /*disable irqs for hs falcon booting as we will poll for halt*/ mutex_lock(&g->pmu.isr_mutex); @@ -272,7 +272,7 @@ int prepare_ucode_blob(struct gk20a *g) return 0; } -u8 lsfm_falcon_disabled(struct gk20a *g, struct ls_flcn_mgr *plsfm, +static u8 lsfm_falcon_disabled(struct gk20a *g, struct ls_flcn_mgr *plsfm, u32 falcon_id) { return (plsfm->disable_mask >> falcon_id) & 0x1; @@ -364,7 +364,7 @@ static int lsfm_discover_ucode_images(struct gk20a *g, } -int pmu_populate_loader_cfg(struct gk20a *g, +static int pmu_populate_loader_cfg(struct gk20a *g, struct lsfm_managed_ucode_img *lsfm, union flcn_bl_generic_desc *p_bl_gen_desc, u32 *p_bl_gen_desc_size) { @@ -431,7 +431,7 @@ int pmu_populate_loader_cfg(struct gk20a *g, return 0; } -int flcn_populate_bl_dmem_desc(struct gk20a *g, +static int flcn_populate_bl_dmem_desc(struct gk20a *g, struct lsfm_managed_ucode_img *lsfm, union flcn_bl_generic_desc *p_bl_gen_desc, u32 *p_bl_gen_desc_size) { @@ -1019,7 +1019,7 @@ err_release_acr_fw: return err; } -u8 pmu_is_debug_mode_en(struct gk20a *g) +static u8 pmu_is_debug_mode_en(struct gk20a *g) { u32 ctl_stat = gk20a_readl(g, pwr_pmu_scpctl_stat_r()); return pwr_pmu_scpctl_stat_debug_mode_v(ctl_stat); @@ -1125,8 +1125,8 @@ static int bl_bootstrap(struct pmu_gk20a *pmu, return 0; } -int gm20b_init_pmu_setup_hw1(struct gk20a *g, struct flcn_bl_dmem_desc *desc, - u32 bl_sz) +static int gm20b_init_pmu_setup_hw1(struct gk20a *g, + struct flcn_bl_dmem_desc *desc, u32 bl_sz) { struct pmu_gk20a *pmu = &g->pmu; diff --git a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c index a2aa81d8..293c6c74 100644 --- a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c @@ -64,7 +64,7 @@ static bool gm20b_kind_zbc(u8 k) k <= gmmu_pte_kind_s8_2s_v()); } -void gm20b_init_kind_attr(void) +static void gm20b_init_kind_attr(void) { u16 k; diff --git a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c b/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c index b5477c0f..6d94e299 100644 --- a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c +++ b/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c @@ -30,17 +30,17 @@ struct gating_desc { u32 disable; }; /* slcg bus */ -const struct gating_desc gm20b_slcg_bus[] = { +static const struct gating_desc gm20b_slcg_bus[] = { {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe}, }; /* slcg ce2 */ -const struct gating_desc gm20b_slcg_ce2[] = { +static const struct gating_desc gm20b_slcg_ce2[] = { {.addr = 0x00106f28, .prod = 0x00000000, .disable = 0x000007fe}, }; /* slcg chiplet */ -const struct gating_desc gm20b_slcg_chiplet[] = { +static const struct gating_desc gm20b_slcg_chiplet[] = { {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007}, {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007}, {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007}, @@ -48,23 +48,23 @@ const struct gating_desc gm20b_slcg_chiplet[] = { }; /* slcg ctxsw firmware */ -const struct gating_desc gm20b_slcg_ctxsw_firmware[] = { +static const struct gating_desc gm20b_slcg_ctxsw_firmware[] = { {.addr = 0x00005f00, .prod = 0x00020008, .disable = 0x0003fffe}, }; /* slcg fb */ -const struct gating_desc gm20b_slcg_fb[] = { +static const struct gating_desc gm20b_slcg_fb[] = { {.addr = 0x00100d14, .prod = 0xfffffffe, .disable = 0xfffffffe}, {.addr = 0x00100c9c, .prod = 0x000001fe, .disable = 0x000001fe}, }; /* slcg fifo */ -const struct gating_desc gm20b_slcg_fifo[] = { +static const struct gating_desc gm20b_slcg_fifo[] = { {.addr = 0x000026ac, .prod = 0x00000100, .disable = 0x0001fffe}, }; /* slcg gr */ -const struct gating_desc gm20b_slcg_gr[] = { +static const struct gating_desc gm20b_slcg_gr[] = { {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x03fffffe}, {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, {.addr = 0x00409894, .prod = 0x00000000, .disable = 0x0003fffe}, @@ -126,13 +126,13 @@ const struct gating_desc gm20b_slcg_gr[] = { }; /* slcg ltc */ -const struct gating_desc gm20b_slcg_ltc[] = { +static const struct gating_desc gm20b_slcg_ltc[] = { {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe}, {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe}, }; /* slcg perf */ -const struct gating_desc gm20b_slcg_perf[] = { +static const struct gating_desc gm20b_slcg_perf[] = { {.addr = 0x001be018, .prod = 0x000001ff, .disable = 0x00000000}, {.addr = 0x001bc018, .prod = 0x000001ff, .disable = 0x00000000}, {.addr = 0x001b8018, .prod = 0x000001ff, .disable = 0x00000000}, @@ -140,12 +140,12 @@ const struct gating_desc gm20b_slcg_perf[] = { }; /* slcg PriRing */ -const struct gating_desc gm20b_slcg_priring[] = { +static const struct gating_desc gm20b_slcg_priring[] = { {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001}, }; /* slcg pwr_csb */ -const struct gating_desc gm20b_slcg_pwr_csb[] = { +static const struct gating_desc gm20b_slcg_pwr_csb[] = { {.addr = 0x0000017c, .prod = 0x00020008, .disable = 0x0003fffe}, {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, {.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe}, @@ -153,35 +153,35 @@ const struct gating_desc gm20b_slcg_pwr_csb[] = { }; /* slcg pmu */ -const struct gating_desc gm20b_slcg_pmu[] = { +static const struct gating_desc gm20b_slcg_pmu[] = { {.addr = 0x0010a17c, .prod = 0x00020008, .disable = 0x0003fffe}, {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe}, {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, }; /* therm gr */ -const struct gating_desc gm20b_slcg_therm[] = { +static const struct gating_desc gm20b_slcg_therm[] = { {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, }; /* slcg Xbar */ -const struct gating_desc gm20b_slcg_xbar[] = { +static const struct gating_desc gm20b_slcg_xbar[] = { {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe}, {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe}, }; /* blcg bus */ -const struct gating_desc gm20b_blcg_bus[] = { +static const struct gating_desc gm20b_blcg_bus[] = { {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000}, }; /* blcg ctxsw firmware */ -const struct gating_desc gm20b_blcg_ctxsw_firmware[] = { +static const struct gating_desc gm20b_blcg_ctxsw_firmware[] = { {.addr = 0x00022400, .prod = 0x00000000, .disable = 0x00000000}, }; /* blcg fb */ -const struct gating_desc gm20b_blcg_fb[] = { +static const struct gating_desc gm20b_blcg_fb[] = { {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000}, {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000}, {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000}, @@ -191,12 +191,12 @@ const struct gating_desc gm20b_blcg_fb[] = { }; /* blcg fifo */ -const struct gating_desc gm20b_blcg_fifo[] = { +static const struct gating_desc gm20b_blcg_fifo[] = { {.addr = 0x000026a4, .prod = 0x0000c242, .disable = 0x00000000}, }; /* blcg gr */ -const struct gating_desc gm20b_blcg_gr[] = { +static const struct gating_desc gm20b_blcg_gr[] = { {.addr = 0x004041f0, .prod = 0x00004046, .disable = 0x00000000}, {.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000}, {.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000}, @@ -261,7 +261,7 @@ const struct gating_desc gm20b_blcg_gr[] = { }; /* blcg ltc */ -const struct gating_desc gm20b_blcg_ltc[] = { +static const struct gating_desc gm20b_blcg_ltc[] = { {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000}, {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000}, {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000}, @@ -269,23 +269,23 @@ const struct gating_desc gm20b_blcg_ltc[] = { }; /* blcg pwr_csb */ -const struct gating_desc gm20b_blcg_pwr_csb[] = { +static const struct gating_desc gm20b_blcg_pwr_csb[] = { {.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000}, }; /* blcg pmu */ -const struct gating_desc gm20b_blcg_pmu[] = { +static const struct gating_desc gm20b_blcg_pmu[] = { {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000}, }; /* blcg Xbar */ -const struct gating_desc gm20b_blcg_xbar[] = { +static const struct gating_desc gm20b_blcg_xbar[] = { {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000}, {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000}, }; /* pg gr */ -const struct gating_desc gm20b_pg_gr[] = { +static const struct gating_desc gm20b_pg_gr[] = { }; /* static inline functions */ @@ -440,21 +440,6 @@ void gm20b_slcg_priring_load_gating_prod(struct gk20a *g, } } -void gm20b_slcg_pwr_csb_load_gating_prod(struct gk20a *g, - bool prod) -{ - u32 i; - u32 size = sizeof(gm20b_slcg_pwr_csb) / sizeof(struct gating_desc); - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_slcg_pwr_csb[i].addr, - gm20b_slcg_pwr_csb[i].prod); - else - gk20a_writel(g, gm20b_slcg_pwr_csb[i].addr, - gm20b_slcg_pwr_csb[i].disable); - } -} - void gm20b_slcg_pmu_load_gating_prod(struct gk20a *g, bool prod) { @@ -620,21 +605,6 @@ void gm20b_blcg_pmu_load_gating_prod(struct gk20a *g, } } -void gm20b_blcg_xbar_load_gating_prod(struct gk20a *g, - bool prod) -{ - u32 i; - u32 size = sizeof(gm20b_blcg_xbar) / sizeof(struct gating_desc); - for (i = 0; i < size; i++) { - if (prod) - gk20a_writel(g, gm20b_blcg_xbar[i].addr, - gm20b_blcg_xbar[i].prod); - else - gk20a_writel(g, gm20b_blcg_xbar[i].addr, - gm20b_blcg_xbar[i].disable); - } -} - void gr_gm20b_pg_gr_load_gating_prod(struct gk20a *g, bool prod) { diff --git a/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.c index 0309e110..2a654760 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_ctx_gm20b.c @@ -57,7 +57,7 @@ static int gr_gm20b_get_netlist_name(int index, char *name) return -1; } -bool gr_gm20b_is_firmware_defined(void) +static bool gr_gm20b_is_firmware_defined(void) { #ifdef GM20B_NETLIST_IMAGE_FW_NAME return true; diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 835ff6bf..d40e9d52 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -342,7 +342,7 @@ static void gr_gm20b_set_alpha_circular_buffer_size(struct gk20a *g, u32 data) } } -void gr_gm20b_set_circular_buffer_size(struct gk20a *g, u32 data) +static void gr_gm20b_set_circular_buffer_size(struct gk20a *g, u32 data) { struct gr_gk20a *gr = &g->gr; u32 gpc_index, ppc_index, stride, val; diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 574ad926..2b534816 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -34,7 +34,7 @@ #define FUSE_OPT_PRIV_SEC_DIS_0 0x264 #define PRIV_SECURITY_DISABLE 0x01 -struct gpu_ops gm20b_ops = { +static struct gpu_ops gm20b_ops = { .clock_gating = { .slcg_bus_load_gating_prod = gm20b_slcg_bus_load_gating_prod, diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c index a089b59c..10e3ba7f 100644 --- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c @@ -197,7 +197,7 @@ static void gm20b_ltc_init_fs_state(struct gk20a *g) gk20a_writel(g, ltc_ltcs_ltss_intr_r(), reg); } -void gm20b_ltc_isr(struct gk20a *g) +static void gm20b_ltc_isr(struct gk20a *g) { u32 mc_intr, ltc_intr; int ltc, slice; @@ -266,7 +266,7 @@ static void gm20b_ltc_g_elpg_flush_locked(struct gk20a *g) "g_elpg_flush too many retries"); } -u32 gm20b_ltc_cbc_fix_config(struct gk20a *g, int base) +static u32 gm20b_ltc_cbc_fix_config(struct gk20a *g, int base) { u32 val = gk20a_readl(g, ltc_ltcs_ltss_cbc_num_active_ltcs_r()); if (val == 2) { @@ -282,7 +282,7 @@ u32 gm20b_ltc_cbc_fix_config(struct gk20a *g, int base) /* * Performs a full flush of the L2 cache. */ -void gm20b_flush_ltc(struct gk20a *g) +static void gm20b_flush_ltc(struct gk20a *g) { u32 op_pending; unsigned long now, timeout; diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c index 13e7859f..030701b9 100644 --- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c @@ -220,7 +220,7 @@ fail: return ret; } -void gm20b_vm_clear_sparse(struct vm_gk20a *vm, u64 vaddr, +static void gm20b_vm_clear_sparse(struct vm_gk20a *vm, u64 vaddr, u64 size, u32 pgsz_idx) { u64 vaddr_hi; u32 pde_lo, pde_hi, pde_i; @@ -253,14 +253,15 @@ void gm20b_vm_clear_sparse(struct vm_gk20a *vm, u64 vaddr, return; } -bool gm20b_mm_mmu_debug_mode_enabled(struct gk20a *g) +static bool gm20b_mm_mmu_debug_mode_enabled(struct gk20a *g) { u32 debug_ctrl = gk20a_readl(g, gr_gpcs_pri_mmu_debug_ctrl_r()); return gr_gpcs_pri_mmu_debug_ctrl_debug_v(debug_ctrl) == gr_gpcs_pri_mmu_debug_ctrl_debug_enabled_v(); } -void gm20b_mm_set_big_page_size(struct gk20a *g, void *inst_ptr, int size) +static void gm20b_mm_set_big_page_size(struct gk20a *g, + void *inst_ptr, int size) { u32 val; diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c index 91927950..6a7f0d92 100644 --- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c @@ -131,7 +131,7 @@ static struct pg_init_sequence_list _pginitseq_gm20b[] = { { 0x0010e040, 0x00000000}, }; -int gm20b_pmu_setup_elpg(struct gk20a *g) +static int gm20b_pmu_setup_elpg(struct gk20a *g) { int ret = 0; u32 reg_writes; @@ -153,7 +153,7 @@ int gm20b_pmu_setup_elpg(struct gk20a *g) return ret; } -void pmu_handle_acr_init_wpr_msg(struct gk20a *g, struct pmu_msg *msg, +static void pmu_handle_acr_init_wpr_msg(struct gk20a *g, struct pmu_msg *msg, void *param, u32 handle, u32 status) { gk20a_dbg_fn(""); @@ -166,7 +166,7 @@ void pmu_handle_acr_init_wpr_msg(struct gk20a *g, struct pmu_msg *msg, } -int gm20b_pmu_init_acr(struct gk20a *g) +static int gm20b_pmu_init_acr(struct gk20a *g) { struct pmu_gk20a *pmu = &g->pmu; struct pmu_cmd cmd; @@ -190,7 +190,7 @@ int gm20b_pmu_init_acr(struct gk20a *g) return 0; } -void pmu_handle_fecs_boot_acr_msg(struct gk20a *g, struct pmu_msg *msg, +static void pmu_handle_fecs_boot_acr_msg(struct gk20a *g, struct pmu_msg *msg, void *param, u32 handle, u32 status) { diff --git a/drivers/gpu/nvgpu/gm20b/regops_gm20b.c b/drivers/gpu/nvgpu/gm20b/regops_gm20b.c index 71ccda37..cc1c72c2 100644 --- a/drivers/gpu/nvgpu/gm20b/regops_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/regops_gm20b.c @@ -434,67 +434,68 @@ static const struct regop_offset_range gm20b_qctl_whitelist_ranges[] = { static const u32 gm20b_qctl_whitelist_ranges_count = ARRAY_SIZE(gm20b_qctl_whitelist_ranges); -const struct regop_offset_range *gm20b_get_global_whitelist_ranges(void) +static const struct regop_offset_range *gm20b_get_global_whitelist_ranges(void) { return gm20b_global_whitelist_ranges; } -int gm20b_get_global_whitelist_ranges_count(void) +static int gm20b_get_global_whitelist_ranges_count(void) { return gm20b_global_whitelist_ranges_count; } -const struct regop_offset_range *gm20b_get_context_whitelist_ranges(void) +static const struct regop_offset_range *gm20b_get_context_whitelist_ranges(void) { return gm20b_context_whitelist_ranges; } -int gm20b_get_context_whitelist_ranges_count(void) +static int gm20b_get_context_whitelist_ranges_count(void) { return gm20b_context_whitelist_ranges_count; } -const u32 *gm20b_get_runcontrol_whitelist(void) +static const u32 *gm20b_get_runcontrol_whitelist(void) { return gm20b_runcontrol_whitelist; } -int gm20b_get_runcontrol_whitelist_count(void) +static int gm20b_get_runcontrol_whitelist_count(void) { return gm20b_runcontrol_whitelist_count; } -const struct regop_offset_range *gm20b_get_runcontrol_whitelist_ranges(void) +static const +struct regop_offset_range *gm20b_get_runcontrol_whitelist_ranges(void) { return gm20b_runcontrol_whitelist_ranges; } -int gm20b_get_runcontrol_whitelist_ranges_count(void) +static int gm20b_get_runcontrol_whitelist_ranges_count(void) { return gm20b_runcontrol_whitelist_ranges_count; } -const u32 *gm20b_get_qctl_whitelist(void) +static const u32 *gm20b_get_qctl_whitelist(void) { return gm20b_qctl_whitelist; } -int gm20b_get_qctl_whitelist_count(void) +static int gm20b_get_qctl_whitelist_count(void) { return gm20b_qctl_whitelist_count; } -const struct regop_offset_range *gm20b_get_qctl_whitelist_ranges(void) +static const struct regop_offset_range *gm20b_get_qctl_whitelist_ranges(void) { return gm20b_qctl_whitelist_ranges; } -int gm20b_get_qctl_whitelist_ranges_count(void) +static int gm20b_get_qctl_whitelist_ranges_count(void) { return gm20b_qctl_whitelist_ranges_count; } -int gm20b_apply_smpc_war(struct dbg_session_gk20a *dbg_s) +static int gm20b_apply_smpc_war(struct dbg_session_gk20a *dbg_s) { /* Not needed on gm20b */ return 0; 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