From 2eb6dcb4694c8b83e22c50d9fd4d3fdd85b93c46 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 16 Oct 2014 15:15:11 +0300 Subject: gpu: nvgpu: Implement 64k large page support Implement support for 64kB large page size. Add an API to create an address space via IOCTL so that we can accept flags, and assign one flag for enabling 64kB large page size. Also adds APIs to set per-context large page size. This is possible only on Maxwell, so return error if caller tries to set large page size on Kepler. Default large page size is still 128kB. Change-Id: I20b51c8f6d4a984acae8411ace3de9000c78e82f Signed-off-by: Terje Bergstrom --- drivers/gpu/nvgpu/gm20b/fb_gm20b.c | 9 +++++++++ drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h | 16 ++++++++++++++++ drivers/gpu/nvgpu/gm20b/hw_ram_gm20b.h | 20 ++++++++++++++++++++ drivers/gpu/nvgpu/gm20b/mm_gm20b.c | 21 +++++++++++++++++++++ 4 files changed, 66 insertions(+) (limited to 'drivers/gpu/nvgpu/gm20b') diff --git a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c index 34ad6418..a2aa81d8 100644 --- a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c @@ -82,9 +82,18 @@ void gm20b_init_kind_attr(void) } } +static void gm20b_fb_set_mmu_page_size(struct gk20a *g) +{ + /* set large page size in fb */ + u32 fb_mmu_ctrl = gk20a_readl(g, fb_mmu_ctrl_r()); + fb_mmu_ctrl |= fb_mmu_ctrl_use_pdb_big_page_size_true_f(); + gk20a_writel(g, fb_mmu_ctrl_r(), fb_mmu_ctrl); +} + void gm20b_init_fb(struct gpu_ops *gops) { gops->fb.init_fs_state = fb_gm20b_init_fs_state; + gops->fb.set_mmu_page_size = gm20b_fb_set_mmu_page_size; gm20b_init_uncompressed_kind_map(); gm20b_init_kind_attr(); } diff --git a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h index 817e4fc4..7655d2a3 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h @@ -66,6 +66,10 @@ static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void) { return 0x0; } +static inline u32 fb_mmu_ctrl_vm_pg_size_64kb_f(void) +{ + return 0x1; +} static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r) { return (r >> 15) & 0x1; @@ -78,6 +82,18 @@ static inline u32 fb_mmu_ctrl_pri_fifo_space_v(u32 r) { return (r >> 16) & 0xff; } +static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_v(u32 r) +{ + return (r >> 11) & 0x1; +} +static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_true_f(void) +{ + return 0x800; +} +static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_false_f(void) +{ + return 0x0; +} static inline u32 fb_priv_mmu_phy_secure_r(void) { return 0x00100ce4; diff --git a/drivers/gpu/nvgpu/gm20b/hw_ram_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_ram_gm20b.h index 6debecda..2e1df1d4 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_ram_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_ram_gm20b.h @@ -78,6 +78,26 @@ static inline u32 ram_in_page_dir_base_vol_true_f(void) { return 0x4; } +static inline u32 ram_in_big_page_size_f(u32 v) +{ + return (v & 0x1) << 11; +} +static inline u32 ram_in_big_page_size_m(void) +{ + return 0x1 << 11; +} +static inline u32 ram_in_big_page_size_w(void) +{ + return 128; +} +static inline u32 ram_in_big_page_size_128kb_f(void) +{ + return 0x0; +} +static inline u32 ram_in_big_page_size_64kb_f(void) +{ + return 0x800; +} static inline u32 ram_in_page_dir_base_lo_f(u32 v) { return (v & 0xfffff) << 12; diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c index b4622c0b..13e7859f 100644 --- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c @@ -19,6 +19,7 @@ #include "hw_gmmu_gm20b.h" #include "hw_fb_gm20b.h" #include "hw_gr_gm20b.h" +#include "hw_ram_gm20b.h" static int allocate_gmmu_ptes_sparse(struct vm_gk20a *vm, enum gmmu_pgsz_gk20a pgsz_idx, @@ -259,6 +260,25 @@ bool gm20b_mm_mmu_debug_mode_enabled(struct gk20a *g) gr_gpcs_pri_mmu_debug_ctrl_debug_enabled_v(); } +void gm20b_mm_set_big_page_size(struct gk20a *g, void *inst_ptr, int size) +{ + u32 val; + + gk20a_dbg_fn(""); + + gk20a_dbg_info("big page size %d\n", size); + val = gk20a_mem_rd32(inst_ptr, ram_in_big_page_size_w()); + val &= ~ram_in_big_page_size_m(); + + if (size == SZ_64K) + val |= ram_in_big_page_size_64kb_f(); + else + val |= ram_in_big_page_size_128kb_f(); + + gk20a_mem_wr32(inst_ptr, ram_in_big_page_size_w(), val); + gk20a_dbg_fn("done"); +} + void gm20b_init_mm(struct gpu_ops *gops) { gops->mm.set_sparse = gm20b_vm_put_sparse; @@ -273,4 +293,5 @@ void gm20b_init_mm(struct gpu_ops *gops) gops->mm.l2_invalidate = gk20a_mm_l2_invalidate; gops->mm.l2_flush = gk20a_mm_l2_flush; gops->mm.tlb_invalidate = gk20a_mm_tlb_invalidate; + gops->mm.set_big_page_size = gm20b_mm_set_big_page_size; } -- cgit v1.2.2