From 226c671f8e99e7ed274c5c630090c6190a1367a5 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 12 Feb 2015 10:53:26 -0800 Subject: gpu: nvgpu: More robust recovery Make recovery a more straightforward process. When we detect a fault, trigger MMU fault, and wait for it to trigger, and complete recovery. Also reset engines before aborting channel to ensure no stray sync point increments can happen. Change-Id: Iac685db6534cb64fe62d9fb452391f43100f2999 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/709060 (cherry picked from commit 95c62ffd9ac30a0d2eb88d033dcc6e6ff25efd6f) Reviewed-on: http://git-master/r/707443 --- drivers/gpu/nvgpu/gm20b/hw_fifo_gm20b.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gm20b') diff --git a/drivers/gpu/nvgpu/gm20b/hw_fifo_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_fifo_gm20b.h index acbe6a4e..f3a24f61 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_fifo_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_fifo_gm20b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -206,10 +206,22 @@ static inline u32 fifo_intr_en_0_r(void) { return 0x00002140; } +static inline u32 fifo_intr_en_0_sched_error_f(u32 v) +{ + return (v & 0x1) << 8; +} static inline u32 fifo_intr_en_0_sched_error_m(void) { return 0x1 << 8; } +static inline u32 fifo_intr_en_0_mmu_fault_f(u32 v) +{ + return (v & 0x1) << 28; +} +static inline u32 fifo_intr_en_0_mmu_fault_m(void) +{ + return 0x1 << 28; +} static inline u32 fifo_intr_en_1_r(void) { return 0x00002528; -- cgit v1.2.2