From 5cfd481cf5319d52f613cb5c5f66a1f643af5bed Mon Sep 17 00:00:00 2001 From: smadhavan Date: Wed, 5 Sep 2018 12:48:10 +0530 Subject: nvgpu: gm20b: MISRA Rule 21.2 header gurad fixes MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations caused by include guards by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER_H' JIRA NVGPU-1028 Change-Id: Ic60b2de8bb705f189134483fff1e2dff8ea96a12 Signed-off-by: smadhavan Reviewed-on: https://git-master.nvidia.com/r/1808186 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta Reviewed-by: Adeel Raza Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gm20b/regops_gm20b.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gm20b/regops_gm20b.h') diff --git a/drivers/gpu/nvgpu/gm20b/regops_gm20b.h b/drivers/gpu/nvgpu/gm20b/regops_gm20b.h index 99044f09..11a35f89 100644 --- a/drivers/gpu/nvgpu/gm20b/regops_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/regops_gm20b.h @@ -22,8 +22,8 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ -#ifndef __REGOPS_GM20B_H_ -#define __REGOPS_GM20B_H_ +#ifndef NVGPU_GM20B_REGOPS_GM20B_H +#define NVGPU_GM20B_REGOPS_GM20B_H struct dbg_session_gk20a; @@ -41,4 +41,4 @@ const struct regop_offset_range *gm20b_get_qctl_whitelist_ranges(void); u64 gm20b_get_qctl_whitelist_ranges_count(void); int gm20b_apply_smpc_war(struct dbg_session_gk20a *dbg_s); -#endif /* __REGOPS_GM20B_H_ */ +#endif /* NVGPU_GM20B_REGOPS_GM20B_H */ -- cgit v1.2.2