From 9d13ddc17d21e9d4d65530e713a8ca7daf1dd1e2 Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Fri, 27 May 2016 11:27:49 +0530 Subject: gpu: nvgpu: update HAL of ACR BL -update HAL of ACR BL which can support gm204/gm206 and DMATRFBASE method to global JIRA DNVGPU-10 Change-Id: I56fc7ce040dadb6473f6f375ee6ce90783a046ad Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1154954 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gm20b/pmu_gm20b.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gm20b/pmu_gm20b.h') diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.h b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.h index 68f342cc..e3deb6ef 100644 --- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.h @@ -1,7 +1,7 @@ /* * GM20B PMU * - * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -19,5 +19,6 @@ void gm20b_init_pmu_ops(struct gpu_ops *gops); void gm20b_pmu_load_lsf(struct gk20a *g, u32 falcon_id, u32 flags); int gm20b_pmu_init_acr(struct gk20a *g); +void gm20b_write_dmatrfbase(struct gk20a *g, u32 addr); #endif /*__PMU_GM20B_H_*/ -- cgit v1.2.2