From c8a0edc2255a0c4a0a97657fda989216a7e982d4 Mon Sep 17 00:00:00 2001 From: Arto Merilainen Date: Wed, 20 Aug 2014 14:02:59 -0700 Subject: TEMP: gpu: nvgpu: gm20b: Mask LTC interrupts LTC interrputs were set to random values at boot. For now, disable all interrupts. Change-Id: Ibb032cac91d3ea9a951fd8c2eb62a783af5bd1a1 Signed-off-by: Arto Merilainen Reviewed-on: http://git-master/r/482639 Reviewed-by: Lauri Peltonen Tested-by: Lauri Peltonen --- drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h') diff --git a/drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h index 3698a30e..1bc024be 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h @@ -122,6 +122,10 @@ static inline u32 ltc_ltcs_ltss_cbc_ctrl2_clear_lower_bound_f(u32 v) { return (v & 0x1ffff) << 0; } +static inline u32 ltc_ltcs_ltss_intr_r(void) +{ + return 0x0017e20c; +} static inline u32 ltc_ltcs_ltss_cbc_ctrl3_r(void) { return 0x0017e274; -- cgit v1.2.2