From 7d4a4a7da688bcbdd4b76b5641c8e161676c8ba0 Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Tue, 16 Sep 2014 16:00:10 -0700 Subject: gpu: nvgpu: Add GM20b RAM SVOP PDP fuse registers Bug 1550997 Change-Id: I25551fdcb9f7d43dc8631305b784aa9c04040139 Signed-off-by: Alex Frid Reviewed-on: http://git-master/r/499553 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu Tested-by: Seshendra Gadagottu Reviewed-by: Yu-Huan Hsu --- drivers/gpu/nvgpu/gm20b/hw_fuse_gm20b.h | 44 +++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) (limited to 'drivers/gpu/nvgpu/gm20b/hw_fuse_gm20b.h') diff --git a/drivers/gpu/nvgpu/gm20b/hw_fuse_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_fuse_gm20b.h index bd32951c..67a82fa2 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_fuse_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_fuse_gm20b.h @@ -54,4 +54,48 @@ static inline u32 fuse_status_opt_tpc_gpc_r(u32 i) { return 0x00021c38 + i*4; } +static inline u32 fuse_ctrl_opt_tpc_gpc_r(u32 i) +{ + return 0x00021838 + i*4; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_r(void) +{ + return 0x00021944; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_f(u32 v) +{ + return (v & 0x3) << 0; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_m(void) +{ + return 0x3 << 0; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_v(u32 r) +{ + return (r >> 0) & 0x3; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_r(void) +{ + return 0x00021948; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_f(u32 v) +{ + return (v & 0x1) << 0; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_m(void) +{ + return 0x1 << 0; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_v(u32 r) +{ + return (r >> 0) & 0x1; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_yes_f(void) +{ + return 0x1; +} +static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_no_f(void) +{ + return 0x0; +} #endif -- cgit v1.2.2