From 4032e8915a65aa94f8b556676c5606683ec28f52 Mon Sep 17 00:00:00 2001 From: Srirangan Date: Thu, 23 Aug 2018 12:07:41 +0530 Subject: gpu: nvgpu: gm20b: Fix MISRA 15.6 violations MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces, including single statement blocks. Fix errors due to single statement if blocks without braces, introducing the braces. JIRA NVGPU-671 Change-Id: I1651ae8ee680bdeb48606569c4e8c2fc7cb87f20 Signed-off-by: Srirangan Reviewed-on: https://git-master.nvidia.com/r/1805077 Reviewed-by: Konsta Holtta Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gm20b/hal_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index acdf4591..27daccb6 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -716,8 +716,9 @@ int gm20b_init_hal(struct gk20a *g) __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ - if (gops->fuse.check_priv_security(g)) + if (gops->fuse.check_priv_security(g)) { return -EINVAL; /* Do not boot gpu */ + } /* priv security dependent ops */ if (nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { -- cgit v1.2.2