From 23a855b8527e07c047a7c4d3671f39142d9ea432 Mon Sep 17 00:00:00 2001 From: Shashank Singh Date: Wed, 21 Feb 2018 12:14:07 +0530 Subject: gpu: nvgpu: add fault_ch to record_sm_error_state fault_ch is needed by rm-server to send the notification to guest VM. rm-server is going to use gr sources from linux Jira VQRM-2982 Change-Id: Ifb6e8a9630a471d07b89ffaa7f2ceb309220fd21 Signed-off-by: Shashank Singh Signed-off-by: Richard Zhao Reviewed-on: https://git-master.nvidia.com/r/1661665 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gm20b/gr_gm20b.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.h') diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h index bddf6412..3f604028 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h @@ -116,7 +116,8 @@ void gr_gm20b_enable_cde_in_fecs(struct gk20a *g, struct nvgpu_mem *mem); void gr_gm20b_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state); void gr_gm20b_get_access_map(struct gk20a *g, u32 **whitelist, int *num_entries); -int gm20b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, u32 tpc); +int gm20b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, + u32 tpc, struct channel_gk20a *fault_ch); int gm20b_gr_update_sm_error_state(struct gk20a *g, struct channel_gk20a *ch, u32 sm_id, struct nvgpu_gr_sm_error_state *sm_error_state); -- cgit v1.2.2