From 9e328ed6b8826f8a1e86bb4584fbb872e91840f3 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Tue, 30 Apr 2019 17:19:51 -0700 Subject: gpu: nvgpu: add refcounting for MMU debug mode GPC MMU debug mode should be set if at least one channel in the TSG has requested it. Add refcounting for MMU debug mode, to make sure debug mode is disabled only when no channel in the TSG is using it. Bug 2515097 Bug 2713590 Change-Id: Ic5530f93523a9ec2cd3bfebc97adf7b7000531e0 Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/2123017 (cherry picked from commit a1248d87fe6e20aab3e5f2e0764f9fe8d80d0552) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208769 Reviewed-by: Kajetan Dutka Reviewed-by: Alex Waterman Reviewed-by: Winnie Hsu Reviewed-by: mobile promotions Tested-by: Kajetan Dutka Tested-by: mobile promotions GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index d00181af..dacef784 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -1468,10 +1468,15 @@ int gm20b_gr_set_mmu_debug_mode(struct gk20a *g, gr_gpcs_pri_mmu_debug_ctrl_debug_disabled_f(), }; int err; + struct tsg_gk20a *tsg = tsg_gk20a_from_ch(ch); + + if (tsg == NULL) { + return enable ? -EINVAL : 0; + } err = gr_gk20a_exec_ctx_ops(ch, &ctx_ops, 1, 1, 0, NULL); if (err != 0) { - nvgpu_err(g, "Failed to access register"); + nvgpu_err(g, "update MMU debug mode failed"); } return err; } -- cgit v1.2.2