From 8c6a9fd1151299697037d58f33cfa306d8ac5d87 Mon Sep 17 00:00:00 2001 From: Sam Payne Date: Fri, 31 Oct 2014 14:27:33 -0700 Subject: Revert "gpu: nvgpu: GR and LTC HAL to use const structs" This reverts commit 41b82e97164138f45fbdaef6ab6939d82ca9419e. Change-Id: Iabd01fcb124e0d22cd9be62151a6552cbb27fc94 Signed-off-by: Sam Payne Reviewed-on: http://git-master/r/592221 Tested-by: Hoang Pham GVS: Gerrit_Virtual_Submit Reviewed-by: Mitch Luban --- drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 91 +++++++++++++++++++++----------------- 1 file changed, 51 insertions(+), 40 deletions(-) (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 7b69c5c8..8a3de4e8 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -1,5 +1,5 @@ /* - * GM20B GPU GR + * GM20B GPC MMU * * Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved. * @@ -16,7 +16,6 @@ #include #include /* for mdelay */ -#include "gr_ops.h" #include "gk20a/gk20a.h" #include "gk20a/gr_gk20a.h" @@ -29,7 +28,7 @@ #include "pmu_gm20b.h" #include "acr_gm20b.h" -void gr_gm20b_init_gpc_mmu(struct gk20a *g) +static void gr_gm20b_init_gpc_mmu(struct gk20a *g) { u32 temp; @@ -65,7 +64,7 @@ void gr_gm20b_init_gpc_mmu(struct gk20a *g) gk20a_readl(g, fb_fbhub_num_active_ltcs_r())); } -void gr_gm20b_bundle_cb_defaults(struct gk20a *g) +static void gr_gm20b_bundle_cb_defaults(struct gk20a *g) { struct gr_gk20a *gr = &g->gr; @@ -77,7 +76,7 @@ void gr_gm20b_bundle_cb_defaults(struct gk20a *g) gr_pd_ab_dist_cfg2_token_limit_init_v(); } -void gr_gm20b_cb_size_default(struct gk20a *g) +static void gr_gm20b_cb_size_default(struct gk20a *g) { struct gr_gk20a *gr = &g->gr; @@ -87,7 +86,7 @@ void gr_gm20b_cb_size_default(struct gk20a *g) gr_gpc0_ppc0_cbm_alpha_cb_size_v_default_v(); } -int gr_gm20b_calc_global_ctx_buffer_size(struct gk20a *g) +static int gr_gm20b_calc_global_ctx_buffer_size(struct gk20a *g) { struct gr_gk20a *gr = &g->gr; int size; @@ -108,7 +107,7 @@ int gr_gm20b_calc_global_ctx_buffer_size(struct gk20a *g) return size; } -void gr_gm20b_commit_global_attrib_cb(struct gk20a *g, +static void gr_gk20a_commit_global_attrib_cb(struct gk20a *g, struct channel_ctx_gk20a *ch_ctx, u64 addr, bool patch) { @@ -125,7 +124,7 @@ void gr_gm20b_commit_global_attrib_cb(struct gk20a *g, gr_gpcs_tpcs_mpc_vtg_cb_global_base_addr_valid_true_f(), patch); } -void gr_gm20b_commit_global_bundle_cb(struct gk20a *g, +static void gr_gm20b_commit_global_bundle_cb(struct gk20a *g, struct channel_ctx_gk20a *ch_ctx, u64 addr, u64 size, bool patch) { @@ -161,7 +160,7 @@ void gr_gm20b_commit_global_bundle_cb(struct gk20a *g, } -int gr_gm20b_commit_global_cb_manager(struct gk20a *g, +static int gr_gm20b_commit_global_cb_manager(struct gk20a *g, struct channel_gk20a *c, bool patch) { struct gr_gk20a *gr = &g->gr; @@ -248,7 +247,7 @@ int gr_gm20b_commit_global_cb_manager(struct gk20a *g, return 0; } -void gr_gm20b_commit_global_pagepool(struct gk20a *g, +static void gr_gm20b_commit_global_pagepool(struct gk20a *g, struct channel_ctx_gk20a *ch_ctx, u64 addr, u32 size, bool patch) { @@ -260,7 +259,7 @@ void gr_gm20b_commit_global_pagepool(struct gk20a *g, } -int gr_gm20b_handle_sw_method(struct gk20a *g, u32 addr, +static int gr_gm20b_handle_sw_method(struct gk20a *g, u32 addr, u32 class_num, u32 offset, u32 data) { gk20a_dbg_fn(""); @@ -281,10 +280,10 @@ int gr_gm20b_handle_sw_method(struct gk20a *g, u32 addr, gk20a_gr_set_shader_exceptions(g, data); break; case NVB197_SET_CIRCULAR_BUFFER_SIZE: - g->ops.gr->set_circular_buffer_size(g, data); + g->ops.gr.set_circular_buffer_size(g, data); break; case NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE: - g->ops.gr->set_alpha_circular_buffer_size(g, data); + g->ops.gr.set_alpha_circular_buffer_size(g, data); break; default: goto fail; @@ -296,7 +295,7 @@ fail: return -EINVAL; } -void gr_gm20b_set_alpha_circular_buffer_size(struct gk20a *g, u32 data) +static void gr_gm20b_set_alpha_circular_buffer_size(struct gk20a *g, u32 data) { struct gr_gk20a *gr = &g->gr; u32 gpc_index, ppc_index, stride, val; @@ -396,7 +395,7 @@ void gr_gm20b_set_circular_buffer_size(struct gk20a *g, u32 data) } } -void gr_gm20b_enable_hww_exceptions(struct gk20a *g) +static void gr_gm20b_enable_hww_exceptions(struct gk20a *g) { gr_gk20a_enable_hww_exceptions(g); @@ -407,7 +406,7 @@ void gr_gm20b_enable_hww_exceptions(struct gk20a *g) gr_ds_hww_report_mask_2_sph24_err_report_f()); } -void gr_gm20b_set_hww_esr_report_mask(struct gk20a *g) +static void gr_gm20b_set_hww_esr_report_mask(struct gk20a *g) { /* setup sm warp esr report masks */ gk20a_writel(g, gr_gpcs_tpcs_sm_hww_warp_esr_report_mask_r(), @@ -440,7 +439,7 @@ void gr_gm20b_set_hww_esr_report_mask(struct gk20a *g) gr_gpcs_tpcs_sm_hww_global_esr_report_mask_multiple_warp_errors_report_f()); } -bool gr_gm20b_is_valid_class(struct gk20a *g, u32 class_num) +static bool gr_gm20b_is_valid_class(struct gk20a *g, u32 class_num) { bool valid = false; @@ -460,7 +459,7 @@ bool gr_gm20b_is_valid_class(struct gk20a *g, u32 class_num) return valid; } -void gr_gm20b_get_sm_dsm_perf_regs(struct gk20a *g, +static void gr_gm20b_get_sm_dsm_perf_regs(struct gk20a *g, u32 *num_sm_dsm_perf_regs, u32 **sm_dsm_perf_regs, u32 *perf_register_stride) @@ -471,7 +470,7 @@ void gr_gm20b_get_sm_dsm_perf_regs(struct gk20a *g, *perf_register_stride = ctxsw_prog_extended_sm_dsm_perf_counter_register_stride_v(); } -void gr_gm20b_get_sm_dsm_perf_ctrl_regs(struct gk20a *g, +static void gr_gm20b_get_sm_dsm_perf_ctrl_regs(struct gk20a *g, u32 *num_sm_dsm_perf_regs, u32 **sm_dsm_perf_regs, u32 *ctrl_register_stride) @@ -482,7 +481,7 @@ void gr_gm20b_get_sm_dsm_perf_ctrl_regs(struct gk20a *g, *ctrl_register_stride = ctxsw_prog_extended_sm_dsm_perf_counter_control_register_stride_v(); } -u32 gr_gm20b_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index) +static u32 gr_gm20b_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index) { u32 val; struct gr_gk20a *gr = &g->gr; @@ -493,7 +492,7 @@ u32 gr_gm20b_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index) return (~val) & ((0x1 << gr->max_tpc_per_gpc_count) - 1); } -int gr_gm20b_init_fs_state(struct gk20a *g) +static int gr_gm20b_ctx_state_floorsweep(struct gk20a *g) { struct gr_gk20a *gr = &g->gr; u32 tpc_index, gpc_index; @@ -596,7 +595,7 @@ int gr_gm20b_init_fs_state(struct gk20a *g) return 0; } -int gr_gm20b_falcon_load_ucode(struct gk20a *g, u64 addr_base, +static int gr_gm20b_load_ctxsw_ucode_segments(struct gk20a *g, u64 addr_base, struct gk20a_ctxsw_ucode_segments *segments, u32 reg_offset) { gk20a_writel(g, reg_offset + gr_fecs_dmactl_r(), @@ -623,7 +622,7 @@ static void gr_gm20b_load_gpccs_with_bootloader(struct gk20a *g) gr_gk20a_load_falcon_bind_instblk(g); - g->ops.gr->falcon_load_ucode(g, addr_base, + g->ops.gr.falcon_load_ucode(g, addr_base, &g->ctxsw_ucode_info.gpccs, gr_gpcs_gpccs_falcon_hwcfg_r() - gr_fecs_falcon_hwcfg_r()); @@ -649,7 +648,7 @@ static int gr_gm20b_ctx_wait_lsf_ready(struct gk20a *g, u32 timeout, u32 val) return -ETIMEDOUT; } -int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) +static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) { u32 err; gk20a_dbg_fn(""); @@ -711,30 +710,42 @@ int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) } #else -int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) +static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) { return -EPERM; } #endif -#include "gk20a/gr_ops_gk20a.h" -#include "gr_ops_gm20b.h" - -static struct gpu_gr_ops gm20b_gr_ops = { - __set_gr_gm20b_ops(), - __set_gr_gk20a_op(load_ctxsw_ucode) -}; - -static struct gpu_gr_ops gm20b_gr_privsecurity_ops = { - __set_gr_gm20b_ops(), - __set_gr_gm20b_op(load_ctxsw_ucode) -}; - void gm20b_init_gr(struct gpu_ops *gops) { + gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu; + gops->gr.bundle_cb_defaults = gr_gm20b_bundle_cb_defaults; + gops->gr.cb_size_default = gr_gm20b_cb_size_default; + gops->gr.calc_global_ctx_buffer_size = + gr_gm20b_calc_global_ctx_buffer_size; + gops->gr.commit_global_attrib_cb = gr_gk20a_commit_global_attrib_cb; + gops->gr.commit_global_bundle_cb = gr_gm20b_commit_global_bundle_cb; + gops->gr.commit_global_cb_manager = gr_gm20b_commit_global_cb_manager; + gops->gr.commit_global_pagepool = gr_gm20b_commit_global_pagepool; + gops->gr.handle_sw_method = gr_gm20b_handle_sw_method; + gops->gr.set_alpha_circular_buffer_size = gr_gm20b_set_alpha_circular_buffer_size; + gops->gr.set_circular_buffer_size = gr_gm20b_set_circular_buffer_size; + gops->gr.enable_hww_exceptions = gr_gm20b_enable_hww_exceptions; + gops->gr.is_valid_class = gr_gm20b_is_valid_class; + gops->gr.get_sm_dsm_perf_regs = gr_gm20b_get_sm_dsm_perf_regs; + gops->gr.get_sm_dsm_perf_ctrl_regs = gr_gm20b_get_sm_dsm_perf_ctrl_regs; + gops->gr.init_fs_state = gr_gm20b_ctx_state_floorsweep; + gops->gr.set_hww_esr_report_mask = gr_gm20b_set_hww_esr_report_mask; + gops->gr.falcon_load_ucode = gr_gm20b_load_ctxsw_ucode_segments; if (gops->privsecurity) - gops->gr = &gm20b_gr_privsecurity_ops; + gops->gr.load_ctxsw_ucode = gr_gm20b_load_ctxsw_ucode; else - gops->gr = &gm20b_gr_ops; + gops->gr.load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode; + gops->gr.get_gpc_tpc_mask = gr_gm20b_get_gpc_tpc_mask; + gops->gr.free_channel_ctx = gk20a_free_channel_ctx; + gops->gr.alloc_obj_ctx = gk20a_alloc_obj_ctx; + gops->gr.free_obj_ctx = gk20a_free_obj_ctx; + gops->gr.bind_ctxsw_zcull = gr_gk20a_bind_ctxsw_zcull; + gops->gr.get_zcull_info = gr_gk20a_get_zcull_info; } -- cgit v1.2.2