From 1ee25b11c519089da3fdfb299c37eb64d39a2213 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Tue, 6 Oct 2015 10:59:26 -0700 Subject: gpu: nvgpu: Make access map chip specific Bug 1692373 Change-Id: Ie3fc3e02fa7b0636da464d6ee1c28da7a4543ec2 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/812353 --- drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 512c470d..81067f0a 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -1127,6 +1127,23 @@ void gr_gm20b_bpt_reg_info(struct gk20a *g, struct warpstate *w_state) } } +static void gr_gm20b_get_access_map(struct gk20a *g, + u32 **whitelist, int *num_entries) +{ + static u32 wl_addr_gm20b[] = { + /* this list must be sorted (low to high) */ + 0x404468, /* gr_pri_mme_max_instructions */ + 0x418800, /* gr_pri_gpcs_setup_debug */ + 0x419a04, /* gr_pri_gpcs_tpcs_tex_lod_dbg */ + 0x419a08, /* gr_pri_gpcs_tpcs_tex_samp_dbg */ + 0x419e10, /* gr_pri_gpcs_tpcs_sm_dbgr_control0 */ + 0x419f78, /* gr_pri_gpcs_tpcs_sm_disp_ctrl */ + }; + + *whitelist = wl_addr_gm20b; + *num_entries = ARRAY_SIZE(wl_addr_gm20b); +} + void gm20b_init_gr(struct gpu_ops *gops) { gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu; @@ -1184,4 +1201,5 @@ void gm20b_init_gr(struct gpu_ops *gops) gops->gr.init_cyclestats = gr_gm20b_init_cyclestats; gops->gr.enable_cde_in_fecs = gr_gm20b_enable_cde_in_fecs; gops->gr.bpt_reg_info = gr_gm20b_bpt_reg_info; + gops->gr.get_access_map = gr_gm20b_get_access_map; } -- cgit v1.2.2