From fda4ddfa79f3a78becfe44fd558974bd274c03a9 Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Wed, 27 Jul 2016 17:06:36 -0700 Subject: gpu: nvgpu: userd allocation from sysmem When bar1 memory is not supported then userd will be allocated from sysmem. Functions gp_get and gp_put are updated accordingly. JIRA GV11B-1 Change-Id: Ia895712a110f6cca26474228141488f5f8ace756 Signed-off-by: seshendra Gadagottu Reviewed-on: http://git-master/r/1225384 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/gm20b/fifo_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index b5b9c52b..07ad322a 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c @@ -15,6 +15,7 @@ #include #include "gk20a/gk20a.h" +#include "gk20a/fifo_gk20a.h" #include "fifo_gm20b.h" #include "hw_ccsr_gm20b.h" #include "hw_ram_gm20b.h" @@ -133,6 +134,7 @@ static void gm20b_device_info_data_parse(struct gk20a *g, } void gm20b_init_fifo(struct gpu_ops *gops) { + gops->fifo.init_fifo_setup_hw = gk20a_init_fifo_setup_hw; gops->fifo.bind_channel = channel_gm20b_bind; gops->fifo.unbind_channel = channel_gk20a_unbind; gops->fifo.disable_channel = channel_gk20a_disable; @@ -142,6 +144,8 @@ void gm20b_init_fifo(struct gpu_ops *gops) gops->fifo.setup_ramfc = channel_gk20a_setup_ramfc; gops->fifo.channel_set_priority = gk20a_channel_set_priority; gops->fifo.channel_set_timeslice = gk20a_channel_set_timeslice; + gops->fifo.userd_gp_get = gk20a_userd_gp_get; + gops->fifo.userd_gp_put = gk20a_userd_gp_put; gops->fifo.preempt_channel = gk20a_fifo_preempt_channel; gops->fifo.preempt_tsg = gk20a_fifo_preempt_tsg; -- cgit v1.2.2