From ea3d83d98b509b03bbd7df3553719dbb3e3b8748 Mon Sep 17 00:00:00 2001 From: Kevin Huang Date: Wed, 12 Mar 2014 16:35:47 -0700 Subject: video: tegra: host: add gm20b channel op Bug 1450792 Change-Id: I09f7c727a773178613fe555eb025ac324da0008e Signed-off-by: Kevin Huang Reviewed-on: http://git-master/r/381128 Reviewed-on: http://git-master/r/396373 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Arto Merilainen Reviewed-by: Bo Yan --- drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 47 ++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 drivers/gpu/nvgpu/gm20b/fifo_gm20b.c (limited to 'drivers/gpu/nvgpu/gm20b/fifo_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c new file mode 100644 index 00000000..83dc0f79 --- /dev/null +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c @@ -0,0 +1,47 @@ +/* + * GM20B Fifo + * + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "gk20a/gk20a.h" +#include "fifo_gm20b.h" +#include "hw_ccsr_gm20b.h" +#include "hw_ram_gm20b.h" + +static void channel_gm20b_bind(struct channel_gk20a *ch_gk20a) +{ + struct gk20a *g = ch_gk20a->g; + + u32 inst_ptr = ch_gk20a->inst_block.cpu_pa + >> ram_in_base_shift_v(); + + gk20a_dbg_info("bind channel %d inst ptr 0x%08x", + ch_gk20a->hw_chid, inst_ptr); + + ch_gk20a->bound = true; + + gk20a_writel(g, ccsr_channel_inst_r(ch_gk20a->hw_chid), + ccsr_channel_inst_ptr_f(inst_ptr) | + ccsr_channel_inst_target_vid_mem_f() | + ccsr_channel_inst_bind_true_f()); + + gk20a_writel(g, ccsr_channel_r(ch_gk20a->hw_chid), + (gk20a_readl(g, ccsr_channel_r(ch_gk20a->hw_chid)) & + ~ccsr_channel_enable_set_f(~0)) | + ccsr_channel_enable_set_true_f()); +} + +void gm20b_init_fifo(struct gpu_ops *gops) +{ + gops->fifo.bind_channel = channel_gm20b_bind; +} -- cgit v1.2.2