From e1c4d19b4cd2462c2f5b8c6653573ea0e6bbe823 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 21 Mar 2017 09:57:25 -0700 Subject: gpu: nvgpu: add and reorg reset_enable_hw fifo ops fifo reset_enable_hw is reorged to clear and enable pbdma/fifo interrupts after all the required configuration such as configuring timeouts, enabling timeout detections are taken care of. JIRA GPUT19X-74 JIRA GPUT19X-47 Change-Id: Id780cc11d858db18f8d748c037954ede73298506 Signed-off-by: Seema Khowala Reviewed-on: http://git-master/r/1325351 Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gm20b/fifo_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 5a0bd39e..f09da825 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c @@ -223,4 +223,5 @@ void gm20b_init_fifo(struct gpu_ops *gops) gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask; gops->fifo.is_preempt_pending = gk20a_fifo_is_preempt_pending; gops->fifo.init_pbdma_intr_descs = gm20b_fifo_init_pbdma_intr_descs; + gops->fifo.reset_enable_hw = gk20a_init_fifo_reset_enable_hw; } -- cgit v1.2.2