From e039dcbc9dd7d0c47895bdbb49cdc3e1d11a3cae Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 16 Oct 2017 14:58:17 -0700 Subject: gpu: nvgpu: Use nvgpu_rwsem as TSG channel lock Use abstract nvgpu_rwsem as TSG channel list lock instead of the Linux specific rw_semaphore. JIRA NVGPU-259 Change-Id: I41a38b29d4651838b1962d69f102af1384e12cb6 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1579935 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gm20b/fifo_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index d6429871..f4ddd92f 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c @@ -210,13 +210,13 @@ void gm20b_fifo_tsg_verify_status_ctx_reload(struct channel_gk20a *ch) /* If CTX_RELOAD is set on a channel, move it to some other channel */ if (gk20a_fifo_channel_status_is_ctx_reload(ch->g, ch->chid)) { - down_read(&tsg->ch_list_lock); + nvgpu_rwsem_down_read(&tsg->ch_list_lock); nvgpu_list_for_each_entry(temp_ch, &tsg->ch_list, channel_gk20a, ch_entry) { if (temp_ch->chid != ch->chid) { gm20b_fifo_set_ctx_reload(temp_ch); break; } } - up_read(&tsg->ch_list_lock); + nvgpu_rwsem_up_read(&tsg->ch_list_lock); } } -- cgit v1.2.2