From d65f23cb9ad9d270560ec00c775e60ab559e8e93 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 19 Sep 2014 09:34:01 +0300 Subject: gpu: nvgpu: Support 512 channels in gm20b Retrieve channel count from gm20b specific header instead of the gk20a header. This increases channel count from 128 to 512. Change-Id: I96d4887432852795f7f526e33f0d3d2458f3af0e Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/500623 --- drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers/gpu/nvgpu/gm20b/fifo_gm20b.c') diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 86d049cf..cdc8c810 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c @@ -99,6 +99,11 @@ static void gm20b_fifo_trigger_mmu_fault(struct gk20a *g, gk20a_writel(g, fifo_trigger_mmu_fault_r(engine_id), 0); } +static u32 gm20b_fifo_get_num_fifos(struct gk20a *g) +{ + return ccsr_channel__size_1_v(); +} + void gm20b_init_fifo(struct gpu_ops *gops) { gops->fifo.bind_channel = channel_gm20b_bind; @@ -112,4 +117,5 @@ void gm20b_init_fifo(struct gpu_ops *gops) gops->fifo.update_runlist = gk20a_fifo_update_runlist; gops->fifo.trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault; gops->fifo.wait_engine_idle = gk20a_fifo_wait_engine_idle; + gops->fifo.get_num_fifos = gm20b_fifo_get_num_fifos; } -- cgit v1.2.2